Dear expert,
In i.MX6SL platform, we use eMMC for data storage. Do we need the pull-up resistors at the datas (data0 to 7) and CMD signal?
thanks,
Br,
Alyssa
Solved! Go to Solution.
There is no special requirement for external resistors pulling up regarding
the i.MX6 SL eMMC interface. You may look at the i.MX6 SL EVK design schematic.
According to JEDEC specs :
“JEDEC eMMC includes internal pull-up resistors for data lines DAT[7:1]. Immediately
after entering the 4-bit mode, the device disconnects the internal pull-up resistors on the
DAT1 and DAT2 lines. (The DAT3 line internal pull-up is left connected.) Upon entering the 8-bit
mode, the device disconnects the internal pull-ups on the DAT1, DAT2, and DAT[7:4] lines.”
Have a great day,
Yuri
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There is no special requirement for external resistors pulling up regarding
the i.MX6 SL eMMC interface. You may look at the i.MX6 SL EVK design schematic.
According to JEDEC specs :
“JEDEC eMMC includes internal pull-up resistors for data lines DAT[7:1]. Immediately
after entering the 4-bit mode, the device disconnects the internal pull-up resistors on the
DAT1 and DAT2 lines. (The DAT3 line internal pull-up is left connected.) Upon entering the 8-bit
mode, the device disconnects the internal pull-ups on the DAT1, DAT2, and DAT[7:4] lines.”
Have a great day,
Yuri
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Yuri,
You mean that there is no need to add the pull-up resistor?
I will delete the resistor。
Thanks
Yes.
~Yuri.
Hi Yuri,
In i.MX6SL platform, we use eMMC boot.
How do we set the boot_config1/2/4?
Thanks ,
alyssa:smileyconfused:
Please refer to Chapter 8 (System Boot) of the i.MX6 SL
Reference Manual.
In particular, please pay attention on the next :
Table 8-11 (USDHC Boot eFUSE Descriptions) ;
Table 8-14 (SD/MMC IOMUX Pin Configuration).
~Yuri.