Basic Info
- Custom board design based on NXP MCIMX6Q-Smart Device Board (Schematic # SPF-27516_C5)
- Kernel version and/or BSP release used
- MFGTool2 L4.1.15_2.0.0
- BSP - 2.1 Krogoth
- Uboot - v2016.07+gitAUTOINC+e6b42411ab-r0
MX6Q_MMDC_LPDDR2_Register_Programming_Aid_V1.3.xlsx
| Device Information | | |
| Memory type: | LPDDR2 |
| Manufacturer: | Micron - POP Package |
| Memory part number: | MT42L256M32D2LG-18 WTA |
| Density per chip select (Gb): | 4 |
| Number of Chip Selects per channel used2 | 2 |
| Number of Channels used2 | 2 |
| DRAM density per channel (Gb) | 8 |
| Total DRAM density (Gb) | 16 |
| Number of ROW Addresses2 | 14 |
| Number of COLUMN Addresses2 | 10 |
| Number of BANKS2 | 8 |
| Bus Width (input 16, 32, or 64 bits)2 | 32 |
| Clock Cycle Freq (MHz)3 | 533 |
| Clock Cycle Time (ns) | 1.876 |
See attached XLS
I have 2 x 1GB LPDDR 2 RAM as show above - I have attached MICRON data sheet.
When I try to run the .INC file (or converted to JLINK CONFIG) from the programming aid - the config file fails
either DCD Write Failed in ddr_stress_test_v2.60 or via JTAG (which just makes the processor un-haltable/unresponsive)
Please help me figure out what is wrong with my Memory setup script.
Original Attachment has been moved to: ddr-config.gdbinit.zip
Original Attachment has been moved to: MX6Q-TSDF-MPM-2GB-LPDDR2-Script-Aid-v1.3.inc.zip
