i.MX538 PoP with LPDDR2 issue

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

i.MX538 PoP with LPDDR2 issue

3,293 次查看
PatrickLin
Contributor I

Hi all,

We have designed our custom board with i.MX538 PoP with LPDDR2. We are trying to reduce the device sleep current by setting the LPDDR2 RAM into self refresh mode during the power down mode. But we have encountered problem that the system cannot wake up after that. Anyone have experience the same problem?

Please advise.

Thanks.

标签 (2)
0 项奖励
回复
6 回复数

2,956 次查看
TheAdmiral
NXP Employee
NXP Employee

I can try to help, but I really don't have any experience with this issue. This is really being done all in software (ie, you are placing LPDDR2 in self-refresh with a software command).

So how is the LPDDR2 placed into self-refresh: Setting MCR0[FLPMD] in the M4IF block?

And how do you think that the LPDDR2 is coming out of self-refresh upon coming out of Deep Sleep Mode?

Cheers,

Mark

0 项奖励
回复

2,956 次查看
jimmychan
NXP TechSupport
NXP TechSupport

Could you tell me more information?

1. which board (QSB or SMD) you take it for your design reference?

2. which BSP are you using?

0 项奖励
回复

2,956 次查看
PatrickLin
Contributor I

Hi Jimmy,

1) For PMIC part, we reference to QSB with DA9053. For LPDDR2 part, we reference to freescale drawing title "XMCIMX538-POP (SCH-26782).

2) We are using Android BSP version 10.3.

3) We are using Micron LPDDR2 MT42L64M32D1KL-3 IT:A

Thanks.

0 项奖励
回复

2,956 次查看
jimmychan
NXP TechSupport
NXP TechSupport

Have you try the R10.3.2? Or try the R10.4?

0 项奖励
回复

2,956 次查看
PatrickLin
Contributor I

Hi Jimmy,

We have tried on R10.3.2 with same result. Any suggestion?

Thanks.

0 项奖励
回复

2,956 次查看
TureNielsen
Contributor I

Hi,

Have you ensured that you have the correct voltages on the memory in refresh mode?

Regards

Ture

0 项奖励
回复