Hi Stefan
you are right, RM (page 935) describes this is as correct for voltage increase not for decrease,
but only for LDO case. For DC-DC it is correct in both directions, below part of MCIMX28RM p.935 :
"High when switching DC-DC converter control loop has stabilized after a voltage target change. When linear
regulators are active, this bit goes high when the actual voltage is above the target voltage. Therefore,
DC_OK will go high when changing a linear regulator output to a lower value before the actual voltage
decreases to the new target value."
Regarding timeout for voltage stabilization - this depends on loads (number of capacitors, load current),
that is depends on particular design.
Best regards
igor
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