Hello,
We are looking to implement ECC scrubbing on i.MX 8M Plus, but we find the documentation (IMX8MPRM, Rev. 1, 06/2021) to be lacking some critical information, namely:
1) ECCCFG0 - dis_scrub - note implies that scrub is not supported at all, since this SoC only supports inline ECC, so is it supported?
2) ECCFFG1 - data_poision_en - ECCPOISONADDR0/1 not documented
3) single-bit / multi-bit error counters, trigger levels, interrupt status etc. registers are not documented
4) scrub ranges, mechanisms etc. - these registers are used by U-Boot to do initial scrub, but not documented anywhere Where can we get this information?
Similar questions were posted month ago (https://community.nxp.com/t5/i-MX-Processors/i-MX-8M-Plus-DDR-ECC-documentation/m-p/1372898) and it seems that the documentation is still unavailable?
Thanks,
Philippe
