Hi all,
i am using
MX8 DDR Stress Test V3.30
Built on Nov 24 2021 11:14:49
*****************************************
On imx8mn, and MT40A1G16RC-062E:B
After launching ddr training, i get:
- MMU and cache setup complete
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ARM clock(CA53) rate: 1500MHz
DDR Clock: 1200MHz
============================================
DDR configuration
DDR type is DDR4
Data width: 16, bank num: 8
For DDR4, bank num is the total of 2 bank groups and 4 banks per group
Row size: 17, col size: 10
One chip select is used
Number of DDR controllers used on the SoC: 1
Density per chip select: 2048MB
Density per controller is: 2048MB
Total density detected on the board is: 2048MB
============================================
MX8M-nano: Cortex-A53 is found
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============ Step 1: DDRPHY Training... ============
---DDR 1D-Training @1200Mhz...
[Process] End of initialization
PMU: Error: Dbyte 0 couldn't find the rising edge of DQS during RxEn Training
PMU: ***** Assertion Error - terminating *****
[Result] FAILED
PCA9450 is initialized properly, i can see 1.2V generated.
Every help is appreciated.
