configure a gpio in imx8mplus platform

[anand7711]

Hi NXP,

[Description]

We are using GPIO0_IO00 as WiFi enable pin. We are trying to make this pin HIGH from uboot dts.

Below are the changes we tried:

diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts
index f6f33cb769..d7b3998f40 100644
--- a/arch/arm/dts/imx8mp-evk.dts
+++ b/arch/arm/dts/imx8mp-evk.dts

+ wifi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wifi_regon>;
};

pcie0_refclk: pcie0-refclk {
@@ -939,4 +944,10 @@
MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166
>;
};
+
+ pinctrl_wifi_regon: wifi_regon {
+ fsl,pins = <
+ MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x40
+ >;
+ };
};

[Observations]

The pin remains LOW on probing.

Can you please help us to identify where are doing wrong.?

Also, are we programming the correct offset value (MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x40)?

Thank you in advance!

[Chavira]

Hi @anand7711!
Thank you for contacting NXP Support!

To Activate the pull-up resistor you have to use the value "0x140" because the value of the bit 8 "PE" is to enable the pull-up/down resistor, try to use the value 0x140 (refer to iMX8MP Reference Manual to understand each value on page 1616).

If that doesn’t work, try to set up the pin on the "gpio-led" node.

https://github.com/nxp-imx/uboot-imx/blob/lf_v2022.04/arch/arm/dts/imx8mp-evk.dts#L20

Best Regards!
Chavira