clock generation on CCM_CLKO2

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clock generation on CCM_CLKO2

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akashgajjar
Contributor V

Hi,

 i want to generate 24 Mhz clock on CCM_CLK2, ball point W3 for off-chip devices on imx7d sabere board.

can i use this pin for feeding clock to slave module. By default this pin is as a ccm external clko2.

here's memtool dump

root:~# /unit_tests/memtool -32 0x3038BE00 4
E
Reading 0x4 count starting at address 0x3038BE00

0x3038BE00:  00000000 00000000 00000000 00000000

root:~#

can you please help me on this.

Regards,

Akash

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1 Solution
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akashgajjar
Contributor V

Hi Igor,

i successfully generated 24 Mhz clock on GPIO1_IO03  by applying patch in uboot source code

here's routine that may help to other

//added in board file

static void setup_iomux_clko2(void)                                             
{                                                                               
        imx_iomux_v3_setup_pad(MX7D_PAD_GPIO1_IO03__CCM_CLKO2 |                 
                                                MUX_PAD_CTRL(NO_PAD_CTRL));         
}

//added in architecture file

int enable_ccm_clko2(void)                                                      
{                                                                               
        u32 target;                                                             
                                                                                
        target = CLK_ROOT_ON | IPP_DO_CLKO2_FROM_OSC_24M_CLK |                  
                 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) |                          
                 CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1);                         
                                                                                
        clock_set_target_val(IPP_DO_CLKO2, target);                             
                                                                                
        return 0;                                                               
}

and this methods are called from boardfile.

Thank you very much for your support igor.

Regards,

Akash

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4 Replies
169 Views
akashgajjar
Contributor V

Hi Igor,

i successfully generated 24 Mhz clock on GPIO1_IO03  by applying patch in uboot source code

here's routine that may help to other

//added in board file

static void setup_iomux_clko2(void)                                             
{                                                                               
        imx_iomux_v3_setup_pad(MX7D_PAD_GPIO1_IO03__CCM_CLKO2 |                 
                                                MUX_PAD_CTRL(NO_PAD_CTRL));         
}

//added in architecture file

int enable_ccm_clko2(void)                                                      
{                                                                               
        u32 target;                                                             
                                                                                
        target = CLK_ROOT_ON | IPP_DO_CLKO2_FROM_OSC_24M_CLK |                  
                 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) |                          
                 CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1);                         
                                                                                
        clock_set_target_val(IPP_DO_CLKO2, target);                             
                                                                                
        return 0;                                                               
}

and this methods are called from boardfile.

Thank you very much for your support igor.

Regards,

Akash

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168 Views
akashgajjar
Contributor V

Hi Igor,

 i also tried on pin GPIO1_IO03 (N5) muxed with CCM_CLKO2, it's pimnux and register dump is

            fsl,pins = <
                MX7D_PAD_GPIO1_IO03__CCM_CLKO2             0x00000014
            >;

added in dts file,

root:~# /unit_tests/memtool -32 0x302C000C 4
E
Reading 0x4 count starting at address 0x302C000C

0x302C000C:  00000005 00000000 00000000 00000000

root:~#

i am not able to see any frequency on N5 ball point, i can change the mux configuration at runtime

to gpio by memtool and also can change the status of gpio but in CLKO2 mode i am not able to

make it functional.

in ALT5 mode this pin is at ground level only and not generating any frequency.

what seems to be the reason behind this issue.

regards,

Akash

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Akash

please check sect.5.2.8.10 Target Register (CCM_TARGET_ROOTn)

and make necessary settings. For CCM_CLKO2 its address 3038_0000+0xBE00

Best regards
igor

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Akash

please check description in sect.5.2.3 Clock Root Selects,

CCM_TARGET_ROOT i.MX7D Reference Manual
http://cache.nxp.com/files/32bit/doc/ref_manual/IMX7DRM.pdf
Table 5-11. Clock Root Table, address CCM_CLKO2 : 3038_0000+0xBE00

Best regards
igor
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