Why is there only a starting signal output on the i2c bus and no other signals?

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Why is there only a starting signal output on the i2c bus and no other signals?

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宅猫君
Contributor II

我正在使用 SDK V2.2 MCIMX6ULL在正点原子的板子上开发我的应用程序,没有使用操作系统,但是当我使用I2C模块进行通信时,不论我怎么操作,I2C在输出信号的管脚上总是输出一个开始信号后就一直保持低电平,不论我往I2DR寄存器中写入什么值,I2SR总是显示数据总线空闲,我用逻辑分析仪在总线上观察时,总是看到总线在起始信号结束后就没有任何信号且两条线一直都是低电平,主板上每条线上只连接了4.7k上拉电阻,没有连接其他东西,但是就算是主模式,没有链接从设备情况下也应该发送一个寻址的信号,但一直没有,不知道我的代码有问题还是芯片有问题?

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I am using SDK V2.2 MCIMX6ULL to develop my application on a board with punctual atoms, without using an operating system. However, when I use the I2C module for communication, no matter how I operate, I2C always outputs a start signal on the output signal pin and remains low. No matter what value I write to the I2DR register, I2SR always shows that the data bus is idle. When I observe on the bus using a logic analyzer, I always see that the bus has no signal after the start signal ends, and the two lines are always low. Each line on the motherboard is only connected to a 4.7k pull-up resistor, without any other connection. However, even in the main mode and without a link to the slave device, an addressing signal should be sent, but it has not been sent. I wonder if there is a problem with my code or the chip?

my codes:

CLOCK_SetMux(kCLOCK_PerclkMux, 1); /* 1设置时钟源为24m晶振 */
CLOCK_SetDiv(kCLOCK_PerclkDiv, 5); /* 分频器设置为6分,最终时钟为4mhz */

IOMUXC_SetPinMux(IOMUXC_UART5_TX_DATA_I2C2_SCL,0);
IOMUXC_SetPinMux(IOMUXC_UART5_RX_DATA_I2C2_SDA,0);
IOMUXC_SetPinConfig(IOMUXC_UART5_TX_DATA_I2C2_SCL, 0x70B0);
//IOMUXC_SetPinConfig(IOMUXC_UART5_RX_DATA_I2C2_SDA, 0X70B0);
IOMUXC_SetPinConfig(IOMUXC_UART5_RX_DATA_I2C2_SDA,
//IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |//设置快速翻转io
//IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |//设置开漏输出
IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |//设置为keeper,1=pull,0=keeper
//IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |//设置开启施密特触发器,可以过滤波形
IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |//输出驱动能力设置为R0/6,0=关闭,1=R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR
IOMUXC_SW_PAD_CTL_PAD_SPEED(2U) |//速度设置为100mhz,0=50mhz,3=200mhz
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |//pull或者keeper功能使能,两个功能互斥
IOMUXC_SW_PAD_CTL_PAD_PUS(1U));//上下拉设置,2=100k上拉,0=100k下拉,1=47k上拉
IOMUXC_SetPinMux(IOMUXC_UART4_RX_DATA_I2C1_SDA,0);
IOMUXC_SetPinMux(IOMUXC_UART4_TX_DATA_I2C1_SCL,0);
IOMUXC_SetPinConfig(IOMUXC_UART4_RX_DATA_I2C1_SDA,
//IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |//设置快速翻转io
//IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |//设置开漏输出
//IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |//设置为keeper,1=pull,0=keeper
//IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |//设置开启施密特触发器,可以过滤波形
IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |//输出驱动能力设置为R0/6,0=关闭,1=R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR
IOMUXC_SW_PAD_CTL_PAD_SPEED(2U) |//速度设置为100mhz,0=50mhz,3=200mhz
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK);// |//pull或者keeper功能使能,两个功能互斥
//IOMUXC_SW_PAD_CTL_PAD_PUS(1U));//上下拉设置,2=100k上拉,0=100k下拉,1=47k上拉
IOMUXC_SetPinConfig(IOMUXC_UART4_TX_DATA_I2C1_SCL,
//IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |//设置快速翻转io
//IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |//设置开漏输出
//IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |//设置为keeper,1=pull,0=keeper
//IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |//设置开启施密特触发器,可以过滤波形
IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |//输出驱动能力设置为R0/6,0=关闭,1=R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR
IOMUXC_SW_PAD_CTL_PAD_SPEED(2U) |//速度设置为100mhz,0=50mhz,3=200mhz
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK);// |//pull或者keeper功能使能,两个功能互斥
//IOMUXC_SW_PAD_CTL_PAD_PUS(1U));//上下拉设置,2=100k上拉,0=100k下拉,1=47k上拉
//GPIO1_9=>CT_INT,GPIO5_9=>CT_RST
IOMUXC_SetPinMux(IOMUXC_GPIO1_IO09_GPIO1_IO09,0);
IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO09_GPIO1_IO09,
//IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |//设置快速翻转io
//IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |//设置开漏输出
//IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |//设置为keeper,1=pull,0=keeper
//IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |//设置开启施密特触发器,可以过滤波形
IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |//输出驱动能力设置为R0/6,0=关闭,1=R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR
IOMUXC_SW_PAD_CTL_PAD_SPEED(2U) |//速度设置为100mhz,0=50mhz,3=200mhz
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK);// |//pull或者keeper功能使能,两个功能互斥
//IOMUXC_SW_PAD_CTL_PAD_PUS(1U));//上下拉设置,2=100k上拉,0=100k下拉,1=47k上拉
IOMUXC_SetPinMux(IOMUXC_SNVS_SNVS_TAMPER9_GPIO5_IO09,0);
IOMUXC_SetPinConfig(IOMUXC_SNVS_SNVS_TAMPER9_GPIO5_IO09,
//IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |//设置快速翻转io
//IOMUXC_SW_PAD_CTL_PAD_ODE_MASK |//设置开漏输出
//IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |//设置为keeper,1=pull,0=keeper
//IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |//设置开启施密特触发器,可以过滤波形
IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |//输出驱动能力设置为R0/6,0=关闭,1=R0_260_Ohm___3_3V__150_Ohm_1_8V__240_Ohm_for_DDR
IOMUXC_SW_PAD_CTL_PAD_SPEED(2U) |//速度设置为100mhz,0=50mhz,3=200mhz
IOMUXC_SW_PAD_CTL_PAD_PKE_MASK);// |//pull或者keeper功能使能,两个功能互斥
//IOMUXC_SW_PAD_CTL_PAD_PUS(1U));//上下拉设置,2=100k上拉,0=100k下拉,1=47k上拉
gpio_pin_config_t gp;
/* GPIO初始化 */
gp.interruptMode = kGPIO_IntRisingEdge;
gp.direction = kGPIO_DigitalOutput;
gp.outputLogic = 1;
GPIO_PinInit(GPIO1, 9, &gp);//中断pin初始化为高电平
gp.direction = kGPIO_DigitalOutput;
gp.outputLogic = 0;
GPIO_PinInit(GPIO5, 9, &gp);//复位pin初始化为低电平

/* Tricky here: As IRQ handler in example doesn't use parameters, just ignore them */
SystemInstallIrqHandler(GPIO1_Combined_0_15_IRQn, GT_INT_IRQHandler, NULL);

/* Init input switch GPIO. */
EnableIRQ(GPIO1_Combined_0_15_IRQn);

/* Enable GPIO pin interrupt */
GPIO_EnableInterrupts(GPIO1, 1U << 9);

i2c_master_config_t mc;
mc.baudRate_Bps = 100000;
mc.enableMaster = true;
// I2C_MasterInit(I2C2, &mc, CLOCK_GetFreq(kCLOCK_IpgClk) / (CLOCK_GetDiv(kCLOCK_PerclkDiv) + 1U));
// mc.enableMaster = false;
// I2C_MasterInit(I2C1, &mc, CLOCK_GetFreq(kCLOCK_IpgClk) / (CLOCK_GetDiv(kCLOCK_PerclkDiv) + 1U));
I2C_MasterInit(I2C2, &mc, 4000000);
I2C_MasterInit(I2C1, &mc, 4000000);

//被驱动芯片GT1151Q的上电时序:
TD_Touch_Reset();
//复位后将gpio设置为输入
gp.direction = kGPIO_DigitalInput;
gp.outputLogic = 1;
GPIO_PinInit(GPIO1, 9, &gp);//中断pin初始化为高电平

// I2C_MasterTransferCreateHandle(I2C2, &gI2C2handle, GT_I2C_IRQHandler, NULL);
// I2C_MasterTransferCreateHandle(I2C1, &gI2C2handle2, GT_I2C_IRQHandler, NULL);

// I2C1->IFDR = 0x1E;//3072分频系数
// I2C1->I2CR = I2C_I2CR_IEN_MASK;
unsigned char cfg[2];
i2c_master_transfer_t mxf;

mxf.slaveAddress = GT1151QWriteAddr;
mxf.direction = kI2C_Write;
mxf.subaddress = 0x80ff;
mxf.subaddressSize = 2;
mxf.data = cfg;
mxf.dataSize = 2;
mxf.flags = kI2C_TransferDefaultFlag;

I2C_MasterTransferBlocking(I2C2, &mxf);

char buf[20];
ToolGetHexFromShort(I2C1->I2CR, buf);
buf[19] = 0;
TD_LcdUIManager_Print("I2CR:\n\0",0XFFFF0000);
TD_LcdUIManager_Print(buf,0XFFFF0000);

ToolGetHexFromShort(I2C1->IADR, buf);
buf[19] = 0;
TD_LcdUIManager_Print("\nIADR:\n\0",0XFFFF0000);
TD_LcdUIManager_Print(buf,0XFFFF0000);

ToolGetHexFromShort(I2C1->I2SR, buf);
buf[19] = 0;
TD_LcdUIManager_Print("\nI2SR:\n\0",0XFFFF0000);
TD_LcdUIManager_Print(buf,0XFFFF0000);

ToolGetHexFromShort(I2C1->I2DR, buf);
buf[19] = 0;
TD_LcdUIManager_Print("\nI2DR:\n\0",0XFFFF0000);
TD_LcdUIManager_Print(buf,0XFFFF0000);

ToolGetHexFromShort(I2C1->IFDR, buf);
buf[19] = 0;
TD_LcdUIManager_Print("\nIFDR:\n\0",0XFFFF0000);
TD_LcdUIManager_Print(buf,0XFFFF0000);

Additionally, my LCD is working properly, so I can see the specific values of the registers.

Thank you very much for your help.

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宅猫君
Contributor II
问题找到了,其实问题出在mux引脚初始化中,修改以下代码即可:
IOMUXC_SetPinMux(IOMUXC_UART5_TX_DATA_I2C2_SCL,1);
IOMUXC_SetPinMux(IOMUXC_UART5_RX_DATA_I2C2_SDA,1);
其中将0修改为1就可以了,主要是因为uart5和i2c2要在mux中设置将模块交换输出的管脚配置,才能在管脚上输出信号。

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The problem has been found. In fact, the problem lies in the initialization of the mux pin. Simply modify the following code:

IOMUXC_ SetPinMux (IOMUXC_UART5_TX_DATA_I2C2SCL, 1);

IOMUXC_ SetPinMux (IOMUXC_UART5_RX_DATA_I2C2SDA, 1);

Modifying 0 to 1 is sufficient, mainly because uart5 and i2c2 need to set the pin configuration in mux to exchange module outputs in order to output signals on the pins.
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JosephAtNXP
NXP TechSupport
NXP TechSupport

Hi,

Thank you for your interest in NXP Semiconductor products,

I am looking at the code, in the meantime:

Could you please provide the schematics for your board?

Do you have any attachments that show the digital analyzer record?

I understood that you don't have any I2C target on-board, I think that you'll have a header, have you tried both with and without target (other than digital analyzer) connected?

Regards

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宅猫君
Contributor II
现在,我的PWM正常工作了,但是I2C依然还是不能工作,这排除了时钟的问题,我先初始化I2C,读取所有寄存器值之后再开始传输,写入数据,然后再次读所有取寄存器值,我读取到的寄存器值如下:
初始化后:IADR:0000,IFDR:0013,I2CR:0080,I2SR:0081,I2DR:0000
开始传输数据后:
IADR:0000,IFDR:0013,I2CR:00F0,I2SR:0081,I2DR:0000
我使用的是I2C_MasterTransferNonBlocking函数,其中它写入了I2DR一条数据,但是I2SR中显示数据为空,外部总线也没有数据信号发出,我的PWM正常工作了,说明时钟应该也没什么问题,这就不知道为什么不发送数据了。目前已经正常工作的模块有lcdif,UART,PWM,GPT,GPIO等等,,就I2C不能正常工作,我使用的是skd,无操作系统环境。
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Now, my PWM is working normally, but I2C still cannot work, which eliminates the clock issue. I initialize I2C first, read all register values before starting transmission, write data, and then read all register values again. The register values I read are as follows:

After initialization: IADR: 0000, IFDR: 0013, I2CR: 0080, I2SR: 0081, I2DR: 0000

After starting data transfer:

IADR: 0000, IFDR: 0013, I2CR: 00F0, I2SR: 0081, I2DR: 0000

I am using I2C_ The MasterTransferNonBlocking function writes a piece of data to I2DR, but the data displayed in I2SR is empty and there is no data signal sent from the external bus. My PWM is working properly, indicating that there should be no problem with the clock. I don't know why I didn't send the data. At present, the modules that are already working properly include lcdif, UART, PWM, GPT, GPIO, etc. However, I2C cannot function properly. I am using SKD without an operating system environment.
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宅猫君
Contributor II

我的PWM6连接到了JTAG_TDI,PWM8连接到了JTAG_TRST,I2C1连接到了UART4,I2C2连接到了UART5,逻辑分析仪中A0A1是I2C1,A2A3是I2C2,A4A5是PWM68,其中,I2C我没有启动,只启动了PWM,但是pwm还是没有输出任何信号。

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My PWM6 is connected to JTAG_ TDI, PWM8 connected to JTAG_ TRST, I2C1 connected to UART4, I2C2 connected to UART5, A0A1 in the logic analyzer is I2C1, A2A3 is I2C2, and A4A5 is PWM68. Among them, I2C was not started, only PWM was started, but PWM still did not output any signal.

微信截图_20230920143020.jpg微信截图_20230920143417.jpg

Here is my clock configuration code:

void BOARD_BootClockRUN(void)
{
clock_arm_pll_config_t g_ccmConfigArmPll_792M = {.loopDivider = 66U};
g_ccmConfigArmPll_792M.loopDivider = 66U;
//启用外部晶振
CLOCK_SetXtalFreq(24000000U);
CLOCK_SetRtcXtalFreq(32768U);
//设置内核时钟频率
CLOCK_InitArmPll(&g_ccmConfigArmPll_792M); /* Configure ARM PLL to 792M */
CLOCK_SetMux(kCLOCK_Pll1SwMux, 0); /* Now CPU runs again on ARM PLL*/
CLOCK_SetDiv(kCLOCK_ArmDiv, 0); /* Configure ARM clock root with divide 1 */
//CCM寄存器时钟全部使能
CCM->CCGR0 = 0xFFFFFFFFU;
CCM->CCGR1 = 0xFFFFFFFFU;
CCM->CCGR2 = 0xFFFFFFFFU;
CCM->CCGR3 = 0xFFFFFFFFU;
CCM->CCGR4 = 0xFFFFFFFFU;
CCM->CCGR5 = 0xFFFFFFFFU;
//关闭时钟总线
CLOCK_DeinitUsb2Pll();
CLOCK_DeinitAudioPll();
CLOCK_DeinitVideoPll();
CLOCK_DeinitEnetPll();
//CCSR寄存器
//CLOCK_SetMux(kCLOCK_StepMux, 1); /* 转换arm频率时用,0=osc_clk (24M), 1=secondary_clk */
//CLOCK_SetMux(kCLOCK_SecMux, 0); /* secondary_clk选择,0=PLL2 PFD2 (400 M),1=PLL2 (528 M) */
//CLOCK_SetMux(kCLOCK_Pll1SwMux, 0); /* pll1_sw_clk选择,0=pll1_main_clk,1=step_clk */
//CLOCK_SetMux(kCLOCK_Pll3SwMux, 0); /* pll3_sw_clk选择,0=pll3_main_clk,1=pll3 bypass clock */
//CBCDR寄存器
CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0); /* periph_clk2分频系数,3位 */
CLOCK_SetMux(kCLOCK_Periph2Mux, 0); /* peripheral2 main clock,(source of mmdc_clk_root).0=PLL2 (pll2_main_clk),1=derive clock from periph2_clk2_clk clock source */
CLOCK_SetMux(kCLOCK_PeriphMux, 0); /* peripheral main clock.0=PLL2 (pll2_main_clk),1=derive clock from periph2_clk2_clk clock source */
CLOCK_SetDiv(kCLOCK_AxiDiv, 1); /* Axi分频系数,3位 */
CLOCK_SetDiv(kCLOCK_AhbDiv, 3); /* ahb分频系数,3位 */
CLOCK_SetDiv(kCLOCK_IpgDiv, 1); /* ipg分频系数,2位 */
CLOCK_SetMux(kCLOCK_AxiAltMux, 0); /* AXI alternative clock.0=PLL2 PFD2 ,1=PLL3 PFD1 */
CLOCK_SetMux(kCLOCK_AxiMux, 0); /* AXI clock source.0=Periph_clk,1=AXI alternative clock */
CLOCK_SetDiv(kCLOCK_FabricMmdcDiv, 1); /* fabric / mmdc clock分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Periph2Clk2Div, 1); /* periph2_clk2分频系数,3位 */
//CBCMR寄存器
CLOCK_SetDiv(kCLOCK_Lcdif1Div, 0); /* ledif分频系数,3位 */ //lcd分频系数为0,最终频率为216.666Mhz,最终75帧,实测61帧左右
CLOCK_SetMux(kCLOCK_PrePeriph2Mux, 0); /* pre_periph2 clock.0=PLL2 ,1=PLL2 PFD2,2=PLL2 PFD0,3= PLL4 */
CLOCK_SetMux(kCLOCK_Periph2Clk2Mux, 0); /* periph2_clk2.0= pll3_sw_clk ,1=OSC */
CLOCK_SetMux(kCLOCK_PrePeriphMux, 1); /* pre_periph clock.0=PLL2 ,1=PLL2 PFD2,2=PLL2 PFD0,3= divided (/2) PLL2 PFD2 */
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0); /* periph_clk2 clock.0=pll3_sw_clk ,1=osc_clk (pll1_ref_clk),2= pll2_bypass_clk */
//CSCMR1寄存器
CLOCK_SetMux(kCLOCK_EimSlowMux, 0); /* aclk_eim_slow root clock.0=AXI ,1=pll3_sw_clk,2= PLL2 PFD2,3=PLL3 PFD0 */
CLOCK_SetDiv(kCLOCK_Qspi1Div, 1); /* QSPI1分频系数,3位 */
CLOCK_SetDiv(kCLOCK_EimSlowDiv, 1); /* EimSlow分频系数,3位 */
CLOCK_SetMux(kCLOCK_GpmiMux, 0); /* gpmi clock.0=PLL2 PFD2 ,1=PLL2 PFD0 */
CLOCK_SetMux(kCLOCK_BchMux, 0); /* bch clock.0=PLL2 PFD2 ,1=PLL2 PFD0 */
CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0); /* usdhc2 clock.0=PLL2 PFD2 ,1=PLL2 PFD0 */
CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0); /* usdhc1 clock.0=PLL2 PFD2 ,1=PLL2 PFD0 */
CLOCK_SetMux(kCLOCK_Sai3Mux, 0); /* sai3 clock.0=PLL3 PFD2,1=PLL5,2=PLL4 */
CLOCK_SetMux(kCLOCK_Sai2Mux, 0); /* sai2 clock.0=PLL3 PFD2,1=PLL5,2=PLL4 */
CLOCK_SetMux(kCLOCK_Sai1Mux, 0); /* sai1 clock.0=PLL3 PFD2,1=PLL5,2=PLL4 */
CLOCK_SetMux(kCLOCK_Qspi1Mux, 1); /* 0=PLL3,1=PLL2 PFD0,2=PLL2 PFD2,3=PLL2,4=PLL3 PFD3,5=PLL3 PFD2 */
CLOCK_SetMux(kCLOCK_PerclkMux, 0); /* perclk clock,0=ipg clk root,1=osc_clk */
CLOCK_SetDiv(kCLOCK_PerclkDiv, 0); /* Perclk分频系数,6位 */
//CSCMR2寄存器
CLOCK_SetMux(kCLOCK_EsaiMux, 3); /* ESAI clock.0=PLL4 divided clock ,1=PLL3 PFD2 clock,2=PLL5 clock,3=pll3_sw_clk */
CLOCK_SetDiv(kCLOCK_LdbDi1Div, 1); /* ldb分频系数,1位,0=3.5,1=7 */
CLOCK_SetDiv(kCLOCK_LdbDi0Div, 1); /* ldb分频系数,1位,0=3.5,1=7 */
CLOCK_SetMux(kCLOCK_CanMux, 3); /* FlexCAN clock.0=pll3_sw_clk divided clock (60M),1=osc_clk (24M),2=pll3_sw_clk divided clock (80M),3=Disable FlexCAN clock */
CLOCK_SetDiv(kCLOCK_CanDiv, 0);/* FlexCAN分频系数,6位 */
//CSCDR1寄存器
CLOCK_SetDiv(kCLOCK_GpmiDiv, 1);/* gpmi clock分频系数,3位 */
CLOCK_SetDiv(kCLOCK_BchDiv, 1);/* bch clock分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);/* usdhc2 分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);/* usdhc1 频系数,3位 */
CLOCK_SetMux(kCLOCK_UartMux, 0);/* UART clock,0=pll3_80m,1=osc_clk */
CLOCK_SetDiv(kCLOCK_UartDiv, 0);/* UART clock 频系数,3位 */
//CS1CDR寄存器
CLOCK_SetDiv(kCLOCK_EsaiDiv, 7);/* ESAI clock分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);/* sai3 clock pred 分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Sai3Div, 1);/* sai3 clock podf 分频系数,6位 */
CLOCK_SetDiv(kCLOCK_EsaiPreDiv, 1);/* ESAI clock pred 分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);/* sai1 clock pred 分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Sai1Div, 1);/* sai1 clock podf 分频系数,6位 */
//CS2CDR寄存器
CLOCK_SetDiv(kCLOCK_EnfcDiv, 0);/* enfc clock 分频系数,6位 */
CLOCK_SetDiv(kCLOCK_EnfcPreDiv, 0);/* sai1 clock podf 分频系数,3位 */
CLOCK_SetMux(kCLOCK_EnfcMux, 6);/* enfc clock,0=PLL2 PFD0,1=PLL2,2=pll3_sw_clk,3=PLL2 PFD2,4=PLL3 PFD3,6=PLL3 PFD3 */
CLOCK_SetMux(kCLOCK_LdbDi0Mux, 3);/* ldb_di0 clock,0=PLL5 clock,1=PLL2 PFD0,2=PLL2 PFD2,3=PLL2 PFD3,4=PLL2 PFD1,5=PLL3 PFD3 */
CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);/* sai2 clock pred 分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Sai2Div, 1);/* sai2 clock podf 分频系数,6位 */
//CDCDR寄存器
CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);/* spdif0 clock pred 分频系数,3位 */
CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);/* spdif0 clock podf 分频系数,3位 */
CLOCK_SetMux(kCLOCK_SpdifMux, 3);/* spdif0 clock,0=PLL4,1=PLL3 PFD2,2=PLL5,3=pll3_sw_clk */
//CHSCCDR寄存器
CLOCK_SetMux(kCLOCK_EpdcPreMux, 5);/* EPDC root clock pre-multiplexer,0=PLL2, 1=PLL3_SW_CLK, 2=PLL5, 3=PLL2 PFD0, 4=PLL2 PFD2, 5=PLL3 PFD2 */
CLOCK_SetDiv(kCLOCK_EpdcDiv, 1);/* EPDC clock 分频系数,3位 */
CLOCK_SetMux(kCLOCK_EpdcMux, 0);/* EPDC root clock,0=pre-muxed EPDC clock, 1=ipp_di0_clk, 2=ipp_di1_clk, 3=ldb_di0_clk, 4=ldb_di1_clk */
//CSCDR2寄存器
CLOCK_SetDiv(kCLOCK_EcspiDiv, 0);/* ecspi clock podf 分频系数,6位 */
CLOCK_SetMux(kCLOCK_EcspiMux, 0);/* ECSPI clock multiplexor,0=pll3_60m, 1=osc_clk */
CLOCK_SetMux(kCLOCK_Lcdif1PreMux, 2);/* r lcdif1 root clock pre-multiplexer,0=pre-PLL2, 1=PLL3 PFD3, 2=PLL5, 3=PLL2 PFD0, 4=PLL2 PFD1, 5=PLL3 PFD1 */
CLOCK_SetDiv(kCLOCK_Lcdif1PreDiv, 2);/* lcdif1 clock 分频系数,3位 */
CLOCK_SetMux(kCLOCK_Lcdif1Mux, 0);/* LCDIF1 root clock multiplexer,0=divided pre-muxed LCDIF1 clock, 1=ipp_di0_clk, 2=ipp_di1_clk, 3=ldb_di0_clk, 4=ldb_di1_clk */
//CSCDR3寄存器
CLOCK_SetDiv(kCLOCK_CsiDiv, 1);/* csi_mclk 分频系数,3位 */
CLOCK_SetMux(kCLOCK_CsiMux, 0); /* csi_mclk multiplexer, 0=osc_clk (24M), 1=PLL2 PFD2, 2=pll3_120M, 4=PLL3 PFD1 */

/* Update core clock */
SystemCoreClockUpdate();
}

Spoiler
There is no external connection to the PWM, it is suspended and only connected to a 10k pull-up resistor without any wires

I don't know what registers have not been set?

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宅猫君
Contributor II

另外一件事是,我的代码是通过SDP命令下发后运行的,不是通过EMMC或者其他方式加载的,系统的上电启动是设置为串口启动,然后我通过串口的SDP write 镜像复制到内存,然后通过jumpto命令跳转运行的。

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Another thing is that my code is run after being issued with the SDP command, not loaded through EMMC or other methods. The system's power on startup is set to serial port startup, and then I copy it to memory through the SDP write image of the serial port, and then run it through the jump to command.

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宅猫君
Contributor II

感谢回答,我今天发现我的PWM模块也是一样的情况,好像这两个模块是用的同一个时钟源吧?那答案很明显就是时钟源的问题了,但是我还没找到具体时钟源配置的问题在哪,我的pwm模块在开启后也是不会输出信号,管脚一直都是保持低电平,中断也不会进入,这两个模块的时钟源要怎么设置才能正确呢?

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Thank you for your answer. I found out today that my PWM module is also in the same situation. It seems that these two modules are using the same clock source, right? The answer is obviously the problem with the clock source, but I haven't found the specific problem with the clock source configuration yet. My PWM module also won't output signals after being turned on, the pins always stay low, and interrupts won't enter. How do I set the clock sources of these two modules correctly?

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