Why in some output pads of the DDR like address or clock has a ODT field?

[diegoperez]

Hi,

Why in some output pads of the DDR like address or clock has a ODT field?

I think the ODT is asserted on the read side, in data lines is asserted by imx when read data and asserted by DDR device when imx is writing to DDR device. Therefore, I don’t understand why the field ODT is present, for instance, in IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR02 pad control register.

I think the outputs are managed only by DSE in order to mantain SI compatibility.

best regards.

[Yuri]

Hello,

  Basically, ODT feature is intended for data DQ, data strobes DQS, and data masks DM.
Address and command lines are not affected by the ODT.

  The ODT field of DRAM_ADDRxx register relates only to address lines, and

really should not be used. The MMDC PHY ODT control register is applied to

configure data DQ, data strobes DQS, and data masks DM. This register is used really for

ODT configuring.

Have a great day,

Yuri

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