Where should iomux setting be applied in kernel tree

[mihaitaivascu]

Hello,

     I'm working on enabling CCM_CLKO2 clock on GPIO3 as described in iMX6 quad manual. I was told I need to enable GPIO3 in bootloader, I assume is in devicetree (.dtsi) files.

Also, I don't know where should I set the CCM_CCOSR register. In the drivers/pinctrl/pinctrl-imx6q.c file ? I see there are defined the padding.

    Where is the correct place to set this iomux configuration ?

IOMUXC_SW_MUX_CTL_PAD_GPIO03

IOMUXC_SW_PAD_CTL_PAD_GPIO03

Thank you,

        Mihaita

[mihaitaivascu]

i don't have the memtool app.

[BiyongSUN]

memtool app is part of the BSP release. you can download it.

[mihaitaivascu]

Hello Biyong,

    I can use now memtool, thank you. I  set GPIO 5 mux mode to 0x3 and CCM_COSR register to 0x8e.

   The problem is that I don't know how to connect the GPIO5 to one of 10 GPIO pins available on imx6q for user purpose

in order to export it on the board and put an osclilloscope on it.

    For example, GPIO_5 translates to pin GPIO1_IO05 which is not available to be exported on my board. What should I do in order to have the CLK01 clock set by GPIO5 on my board ?

Thank you,

      Mihaita

[BiyongSUN]

In the table 4.2 Muxing Options, already show how to configure the it.

Set IOMUXC_SW_MUX_CTL_PAD_GPIO05 to ALT3.

Please also set the iomux control.

You can get  4.1.1 Pin Assignments.

If you have download the iomux tool, it will be helpful. it will show you even where is the Pin Assignments

i.MX6Q|i.MX 6Quad Processors|Quad Core|Freescale

[mihaitaivascu]

Hello,

    Thank you for your support.

    I have set the following:

IOMUXC_SW_PAD_CTL_PAD_GPIO05 = 0x1b0b0

IOMUXC_SW_MUX_CTL_PAD_GPIO05 = 0x3

CCM_CCOSR               = 0x8e

   The problem that the pin on the board I can put an oscilloscope on it and measure clock can only be one of the GPIOs pins available on a phyFlex module with imx6 processor. The hardware engineer told me he can export on the GPIO pins of the board only one of those GPIOs.

    GPIO1_IO05 is not on that list. I programmed correctly the iomux for GPIO5, selected correctly the mux mode and configured CCM_CCOSR register correctly

in order for CLKO1 to be enabled and ckil_syn_clk_root clock to be used. The problem is that I told hardware engineer to export the GPIO1_IO05 on the board

and that pin is not available in the list of GPIO pins for user purposes that the imx6 module I have offers.

     So the question would be how to connect GPIO1_IO05 to a GPIO that can be exported on a GPIO pin on my board so I can actually be able to measure and use the clock I configured.

Thank you,

       Mihaita

[BiyongSUN]

If hardware engineer confirmed it is the hardware issue can not wire out.

It has no any way to make it.

[mihaitaivascu]

Ok, but usually how it is done for any hardware ? After configuring correctly

IOMUXC_SW_PAD_CTL_PAD_GPIO05 = 0x1b0b0

IOMUXC_SW_MUX_CTL_PAD_GPIO05 = 0x3

CCM_CCOSR               = 0x8e

   how you export the GPIO5 with mux mode CCM_CLKO1 on any pin on the board  in order to physically measure the clock you have selected? CCM_CLKO1 is an internal signal I assume.

Thank you,

         Mihaita

[mihaitaivascu]

The hardware engineer told me that I need to export the clock on one of 11 GPIOs that can be wired on the board. How can i commute the CCM_CLKO1 signal to one of those GPIOs ?

Thank you,

        Mihaita

[BiyongSUN]

The iomux can wire out the CLKO1 and CLKO2 are listed below. Except those pins, no  pin can connect to the CLKO1 and CLKO2.

Which one below, your hardware engineer said he can wire out ?

[mihaitaivascu]

We have this list of available GPIOs that the hardware enginner can route for me on the board so i can measure the CLKO1 clock:

[BiyongSUN]

I give you an example how to check the GPIO you hardware engineer list.

I readlly could not read you hardware engineer's list. 

But you can do, it to use the iomux tool.

As you hardware engineer the ball map the gpio listed to you.

Here is just my guess from your table.

GPIO5_8

See the picture, when you point your mouse to the gpio. or the ball map, the floating note will appear.

It wil show you the function of this pin.  By this way, you can  check if you can find pin for CLKO1 and CLKO2.

And  I have listed the muxing option "Table 4-2. Muxing Options" above already. You just can check if it is in the list that hardware engineer give to you.

[mihaitaivascu]

       Thanks for the information. Can I program the padding for other GPIO exactly like for GPIO05 ?

For example: for IOMUXC_SW_PAD_CLT_PAD_GPIO05 i wrote 0x1b0b0 . Can I write the same value for IOMUXC_SW_PAD_CLT_PAD_GPIO19 ?

i would assume yes, as the bit fields are the same.

[BiyongSUN]

You write  0x1b0b0 to IOMUXC_SW_PAD_CLT_PAD_GPIO05.

What is the meaning for this pad? You want to use this pad as ALT0  ESAI_TX2_RX3?

Suggest you can read

Chapter 36

IOMUX Controller (IOMUXC)

first.

[mihaitaivascu]

i was referring to IOMUXC_SW_PAD_CTL_PAD_GPIOn , not IOMUXC_SW_MUX_CTL_PAD_GPIOn. i know IOMUXC_SW_MUX_CTL_PAD_GPIO5 has to be 0x3

What is the correct value for iomux control ?

[mihaitaivascu]

Hello,

     I guess in order to simplify my problem: I have set up iomuxc and selected the correct clock writing to registers using memtool. How do I tell the hardware engineer that CCM_CLKO1 need to be exported on one of board's GPIO pins so he can measure the clock ?

     There seems to be a missing link in terms of my knowledge related to IOMUX and GPIO configuration. I'm using GPIO5 not as a general GPIO pin (GPIO1_IO05) but as CCM_CLKO1. How can that signal be exported on the board and measured on one of board's GPIO pins ?

Thank you,

      Mihaita

[mihaitaivascu]

According to imx6q manual address of CCM_COSR register is 0x20C4060 but writing to this address directly from a c aplication is not possible. Probably i don't have permission to write there.

So how do you guys configure CCM_COSR register to use ckil_sync_clk_root for CLKO1 ?

Thank you,

        Mihaita Ivascu

[mihaitaivascu]

Hi,

   Could somebody give me some indications on what I'm missing here in order to have ckil_sync_clk_root on GPIO5 on my  board? Do I need to load some clock driver for it ?

Thank you,

         Mihaita

[BiyongSUN]

for verify purpose, you don't have to change any code.

you can use /unit_tests/memtool to set  IOMUXC_SW_MUX_CTL_PAD_GPIO05

and also use memtool to set CLKO1_SEL.

[mihaitaivascu]

Hi Weldong,

   Thank you for the information but I have already done this. I put in pinctrl_hog: hoggrp section :

MX6QDL_PAD_GPIO_5__CCM_CLKO1     0x0001b0b0    /* CCM_CLK01 */  where 0x1b0b0 is necessary to select mux mode for GPIO3 to be CLKO1 as I saw in imx6q manual.

  What I asked is where should I write 0x8e to CCM_COSR register in order to have the ckil_sync_clk_root gated on GPIO5. Because with what i have done so far which is what you told me  when I connect the oscilloscope to GPIO5 pin I don't have  a clok even though I have exported gpio5 and set its direction "out".

   So what I'm missing ?

Thank you,

      Mihaita

[mihaitaivascu]

        I have switched to using CLKO1 as this one can use the ckil_sync_clk_root source. So I added in pinctrl_hog_1: hoggrp-1 section of my .dtsi file the necessary pad: MX6QL_PAD_GPIO5__CCM_CLKO1  for which I checked the definition and it multiplexes GPIO5 to CLKO1.

    Now i should set the CCM_COSR register to 0x8e in order to enable CLKO1 and use ckil_sync_clk_root source.

I don't know where should i do this. where do i write the 0x8e value ? Can I do it at command line to /sys/class/gpio/gpio5 ?

Thank you,

     Mihaita