Using two DDR ICs with i.MX53

[FrancoisLouw]

Hi,

I am trying to do a custom PCB using only two DDR3 ICs, and would appreciate it if somebody can give me a little clarity regarding the following.

Using only two chips, it would seem that you would have to use 16-bit access. The chips would probably have to be on opposite sides of the PCB, to assist with D[15:0] routing. This setup would be:

IC 1:

A[13:0], D[15:0], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, SDODT0, SDQS0, SDQS0_B, SDQS1, SDQS1_B

IC 2:

A[13:0], D[15:0], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS1, SDCKE1, SDCLK_1, SDCLK_1_B, SDODT1, SDQS0, SDQS0_B, SDQS1, SDQS1_B

OR

You can use 32 bit access, and keep both chips on the same side of the PCB, but then you would have to route SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, and SDODT0 to both chips using T-branch topology, which might complicate matters. This setup would be:

IC 1:

A[13:0], D[15:0], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, SDODT0, SDQS0, SDQS0_B, SDQS1, SDQS1_B

IC 2:

A[13:0], D[31:16], SDBA[2:0], RAS, CAS, SDWE, RESET, SDCS0, SDCKE0, SDCLK_0, SDCLK_0_B, SDODT0, SDQS2, SDQS2_B, SDQS3, SDQS3_B

At the moment I am leaning towards the second option, for the sake of being able to do 32-bit access and leaving the bottom side of the PCB free of BGA components. What do you think?

Thanks

[FrancoisLouw · Accepted solution]

Just for future reference:

I decided to go with the second option above. When we received the PCB back, I wrote and ran a small application from on-chip RAM. I ran the same tests as OBDS (walking ones, bank address test, DDR address test) and everything seems to work OK, I am also loading and running U-Boot from DDR. Maybe I will to a more thorough stress-test at a later stage.

[yektaayduk]

Length matching is easier for point to point connection than point to multipoint (I'm using Altium Designer).

For 32 bit data bus, data signal lengths can be matched easily.

I used two chips ,but it was DDR2 .Also SDCLK0 and SDCLK1 seems to behave like the same signal driven by different output drivers.I connected SDCLK0 to one chip ,SDCLK1 to other altough they both are connected to CS0. They are on the same side of the PCB. (Ask to support to verify it)

I think there are DDR2 using board designs for imx53 , imx53EVK and  a version of imx53 ARD-DDR2  .The uboot files are existing in uboot board folders but the schematics and pcbs are not on the freescale website .

I asked for it in the forum , no reply?

[Yuri]

I do not know why the i.MX53 EVK design files are not published on the Web,
but I think they may be provided under Service Request.