Using less memory with i.MX6 SabreLite clone board.

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Using less memory with i.MX6 SabreLite clone board.

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konstantynproko
Contributor III

Hello, We've got SabreLite clone development board from BoundaryDevices (Nitrogen6dl) with dual-lite i.MX6. We are developing our own board based on Freescale reference design and for design reasons we have to use a single DDR3 SDRAM chip: 1x128x16 (256MBytes, 16 bit). I'm using SDP to load u-boot to the development board and successfully doing so for full memory: 4x128x16 (1GB) and half memory: 2x128x16 (512MB). I'm pointing to the predefined DDR3 configuration files in u-boot source code (800mhz_4x128mx16.cfg and 800mhz_2x128mx16.cfg).

When I'm trying my own configuration file for the single DDR3 chip, u-boot fails to load to memory, hangs during upload.

I'm setting: MDCTL register: data width (16 bit), rows, columns, CS0. MDASP register: 0x00000007 (256MB) - 28bits AXI_ADDRESS. THe rest of the registers in DDR3 config files are for timing and delays.

I've checked load address is way bellow the end of single chip memory. I'm new to u-boot and probably missed some necessary steps, is there anything else I need to change to make it work? Thank you very much for any help or suggestions.

Regards,

Konstantyn

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konstantynproko
Contributor III

I've found this link but I've got two DDR3 chips working already with existing DDR3 configuration files. I've done everything suggested in the link without success.

https://community.freescale.com/thread/306795

Regards,

Konstantyn

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konstantynproko
Contributor III

I think I got it. I configured MDASP register using this equation: DDR_CS_SIZE/32MB + 0x7

which gives me 0x0F. u-boot is loading.

Regards,

Konstantyn

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