Unable to access IPU Registers

[aditkous]

Hello all,

I'm trying to get a custom kernel working and for the framebuffer, access to the IPU registers is fundamental. IPU_1_BASE is at 0x02600000. But any sort of read/write access to any of the registers from here throws an error. For example, I tried stopping the DI0 pixel clock (IPUx_DI0_GENERAL) by setting it to 0. But it throws an error.

What I have done so far:

     1. I read from here about enabling the clocks through CCM. Which I have done so far. I wrote 0x3  to both ipu_1_clk_enable and ipu1_ipu_di0_clk_enable in CCM::CCGR3.

     2. I've also configured IOMUXC to IPU_enable through IOMUXC::GPR2 's CH0_MODE, BIT_MAPPING_CH0, DATA_WIDTH_CH0 and DI0_VS_POLARITY.

A R/W access to IPU module still doesn't work. Clearly, what I've done so far is either wrong/incomplete.

What is the procedure to get the IPU (and by extension, the framebuffer) enabled and working? I couldn't find the particular answer in the reference manual. Any idea/assistance would be deeply appreciated.

Thanks and regards

Aditya Kousik

[aditkous]

Here is an update on this issue. I have tinkered with the CCM register values to enable ipu_clk_enable and ipu_di0_clk_enable by writing 0x3 to CCGR3. Resetting CSCMR2 and setting ldb_di0_ipu_div. Reset CDCDR. This set of instructions gave me access to a part of the IPU registers i.e. IPUx_CONF to IPUx_CH_BUF2_RDY1. But a simple read from IPU_IDMAC_CONF crashes the system. This led me to look into the IPUx_CONF register where I found 'enable' bits to the sub-modules. I had set the CONF register to 0x660 for configuring enabling DP,DMFC, DI,DC to enable. And since IDMAC is a disable register, a R/W to IDMAC should work.

Quite stuck so far. Freescale team, please provide some insight,

Thanks,

Aditya

[karina_valencia · Accepted solution]

Re: Unable to access IPU Registers

rogeriopimentel Apr 1, 2014 9:45 AM (in response to gusarambula)

Hi,

If you want to read an IPU register inside kernel code, you can use the followign lines:

  reg = __raw_readl(IC_PP_RSC);

  printk(KERN_INFO "*** Register IPU %x ***\n", reg);

You can try to do it on Freescale kernel.

Rgds

Rogerio