UART config after bl31.bin exit

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UART config after bl31.bin exit

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Contributor III

Hi,

I'm trying to power on and config UART0 after the exit of bl31.bin (ATF) as bootloader so as to allow console access to an app that is depending on this UART config on the imx8QM MEK.

I am able to allocate a new partition and and use  SCFW APIs to set power_mode, clock_rate and enable the clock root. But I get an error (SC_ERR_NOACCESS or 3) when calling sc_pad_set(ipc_handle, SC_P_UART0_RX (or TX), UART_PAD_CTRL). At the end of this config of these pads 21 and 22, I checked the pads are not owned but they still are not assigned to my new partition even though sc_rm_assign_pad(ipc_handle, pt, SC_P_UART0_TX) returns SC_ERR_NONE. Appearing the pad is assigned normally and set movable.

Can anyone please suggest how I can ensure the pads are are correctly assigned to my partition for setup of the UART ?

 

INFO: Entry point address = 0x80020000
INFO: SPSR = 0x3c9
INFO: BL31: Initializing runtime services
INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
INFO: BL31: Preparing for EL3 exit to normal world
INFO: Entry point address = 0x80020000
INFO: SPSR = 0x3c9
INFO: cm_setup_context: enter
INFO: cm_setup_context: security_state=1
INFO: cm_setup_context: exit
INFO: cm_prepare_el3_exit: enter, security_state=1
INFO: cm_prepare_el3_exit: exit
INFO: next_image_info->pc=0x80020000
INFO: bsp_uart_init: Init UART
INFO: bsp_uart_init: sc_rm_partition_alloc: pt=4
INFO: bsp_uart_init: sc_rm_assign_resource: pt=4
INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=21 is not owned
INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=22 is not owned
INFO: bsp_uart_init: sc_rm_assign_pad(21): assigned, pt=4
INFO: bsp_uart_init: sc_rm_assign_pad(22): assigned, pt=4

INFO: bsp_uart_init: sc_rm_set_pad_movable(21-22): movable, pt=4
INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=21 is not owned
INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=22 is not owned
ERROR: bsp_uart_init: sc_pad_set: pad=21, val=0x6000020, sciErr=4
ERROR: bsp_uart_init: sc_pad_set: pad=22, val=0x6000020, sciErr=4


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3 Replies

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NXP TechSupport
NXP TechSupport

Hi rkohli2000

 

some SC_P_UART0 resources like SC_P_UART0_RTS,CTS can be used by M4 SDK

in power_mode_switch.c example, so one can try to remove them in scfw  board.c file.

 

Best regards
igor

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Contributor III

Hi Igor,

Thanks for the reply. I ran this test using a Lauterbach debugger by manually loading via JTAG just bl31.bin  on target and follow it by loading the test app for A53. Then, I set my PC to 0x80000000 and execute the image till handoff to my test app. I haven't manually loaded SCFW. My assumption was that bl31.bin is executing without loading SCFW and communicating with the SCU on its own. How does the SCFW get loaded, and from where in this test configuration ?

Regards

Ravi

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NXP TechSupport
NXP TechSupport

> My assumption was that bl31.bin is executing without loading SCFW

 

one can look at description of boot process in sc_fw_api_qm_b0.pdf included in

SCFW Porting Kit​

 and link https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8-Boot-process-and-creating-a-bootab...

 

1.jpg

 

 

Best regards
igor

 

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