Two NAND flash on CS0 and CS2

[eugenevolkov]

Hello/

In my board, i use two NAND in CS0, and CS2 chip select. But, u-boot detected only one NAND on CS0.

I have a question, u-boot automatically polls the device at the CSn, or this is where you need to set?

[eugenevolkov]

In the spirit of tradition, I'll answer my questions..))

In order to connect two NAND devices, you need to set CONFIG_SYS_MAX_NAND_DEVICE     2

in mx6sabre_common.h file.

[eugenevolkov]

Hi. I no full resolve this problem. After kernel boot i see only one NND flash. So, need to configure kernel settings.

I read chapter 30.4.1 Multiple NAND Support in reference manual:

"A DMA channel will

signify the NAND chip select it wants to access by writing its chip select value in the

GPMI_CTRL0[CS] field and setting the GPMI_CTRL1[DECOUPLE_CS] to 1. This

option is useful if software chooses to use only one DMA channel to access all the

attached NAND devices. "

I find settings in dts file

	gpmi-nand {
		pinctrl_gpmi_nand_1: gpmi-nand-1 {
			fsl,pins = <
				MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
				MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
				MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
				MX6QDL_PAD_NANDF_CS2__NAND_CE2_B   0xb0b1
				MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
				MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
				MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
				MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
				MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
				MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
				MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
				MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
				MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
				MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
				MX6QDL_PAD_SD4_DAT0__NAND_DQS      0x00b1
			>;
		};
	};

So, i set pin CS2.

But, where to set the values of registers?

[eugenevolkov]

log in kernel boot:

nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1

nand: AMD/Spansion S34ML01G1

nand: 128MiB, SLC, page size: 2048, OOB size: 64

gpmi-nand 112000.gpmi-nand: mode:4 ,failed in set feature.

Bad block table found at page 65472, version 0x01

Bad block table found at page 65408, version 0x01

gpmi-nand 112000.gpmi-nand: driver registered.

[igorpadykov]

There is standard procedure how to add a new NAND flash to the BSP:

1. Use the NAND-flash-analysis spreadsheet to

capture ID bytes, timings, and dimensions of the

NAND flash

2. Add these parameters into the BSP source code.

• MTD standard table is checked first by MTD

drivers/mtd/nand/nand_ids.c

• Freescale BSP extended table is checked second

drivers/mtd/nand/nand_device_info.c

• For the NAND to be recognized, it must have an

entry in both tables.

Best regards

igor

[EmbEng]

igorpadykov wrote:

There is standard procedure how to add a new NAND flash to the BSP:

1. Use the NAND-flash-analysis spreadsheet to

capture ID bytes, timings, and dimensions of the

NAND flash

2. Add these parameters into the BSP source code.

• MTD standard table is checked first by MTD

drivers/mtd/nand/nand_ids.c

• Freescale BSP extended table is checked second

drivers/mtd/nand/nand_device_info.c

• For the NAND to be recognized, it must have an

entry in both tables.

Best regards

igor

igorpadykov‌ is there any standard procedure for adding new NOR flash to BSP too?

P.S: I am using T1042 reference design and using same part no. for NOR flash as used in reference design board.

[eugenevolkov]

Hi Igor.

I add chip ids list in nand_ids.c

i not found nand_device_info.c file in drivers/mtd/nand/. Version BSP - 3.10.53_1.1.0

in u-boot i see two nand 128MB.

NAND:  256 MiB

In kernel (after add ids list):

nand: device found, Manufacturer ID: 0x01, Chip ID: 0xf1

nand: AMD/Spansion S34ML01G100TFI00 1G 3.3V 8-bit

nand: 128MiB, SLC, page size: 2048, OOB size: 64

Bad block table found at page 65472, version 0x01

Bad block table found at page 65408, version 0x01

gpmi-nand 112000.gpmi-nand: driver registered.

After boot linux i see only one nand - mtdblock0

root@imx6solosabreauto:~# cat /proc/partitions

major minor  #blocks  name

  31        0     131072 mtdblock0

179        0    3872256 mmcblk2

179        1       8192 mmcblk2p1

179        2      65536 mmcblk2p2

root@imx6solosabreauto:~#

I do not even know what to do. U-boot sees two devices, so you can eliminate the hardware problem.

[igorpadykov]

Hi Eugene

suggest  post this to meta-fsl-arm mailing list, so that someone familiar with Yocto

nand problems could try to assist you.

https://lists.yoctoproject.org/listinfo/meta-freescale

~igor

[eugenevolkov]

Hi Igor.

I think it is too early to send in Yocto

Answer me one question - Freescale processor tested with two NAND IC(no die)?  I use official relise, which, as I understand it was tested.

[eugenevolkov]

it was a mistake to think that the u-boot correctly detects NAND IC on  CS2.

In both cases(u-boot, kernel), processor not drive CS2 pin. I not find any documentation, any phrases, which would concern settings multiple NAND support in official BSP from Freescale.

I would have understood it if I would not need the settings and all IC would be detected automatically. but it is not!

[eugenevolkov]

I just killed it ...

I set CONFIG_SYS_MAX_NAND_DEVICE to 4 and u-boot shows 512MB size. Now everything is clear - it just multiplies the size of the first NAND on CONFIG_SYS_MAX_NAND_DEVICE.

[igorpadykov]

Hi Eugene

no, it not detects automatically, it is necessary to modify

sources for such usage.

Best regards

igor

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[eugenevolkov]

What is the file I need to set CS2?

I set pad

MX6_PAD_NANDF_CS2__NAND_CE2_B

| MUX_PAD_CTRL(GPMI_PAD_CTRL2),

in im6<board_name>.c