Trying to register IRQ for GPT2 capture event on IMX6ULL board

[phaniteja]

Hello,

Here is my code snippet

platform_get_resource(pdev, IORESOURCE_MEM, 0);
devm_ioremap_resource(&pdev->dev, mem);
timer->irq = platform_get_irq(pdev, 0);
devm_request_irq(p_dev, timer->irq, r_irq_handler, 2, INPUT_PIN_DESC, pdev->dev.of_node);

DTS file:

gpttest: gpttest@020e8000 {
compatible = "fsl,imx-gpttest";
reg = <0x020e8000 0x4000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_GPT2_BUS>,
<&clks IMX6UL_CLK_GPT2_SERIAL>;
clock-names = "ipg", "per";
};

My devm_request_irq call is failing here with the following out:

   genirq: Setting trigger mode 2 for irq 36 failed (irq_chip_set_type_parent+0x0/0x20)
   DRIVER_NAME: probe of 20e8000.gpio failed with error -22

I have done some debugging, from the function __irq_set_trigger() in manage.c while validating the chip->irq_set_type() its returning -22 (invald argument) error

Queries:

1. When I tried to register for IRQ 109, why it is taking as 36?
2. Is there any chip level limitation for FALLING_EDGE interrupt for this particular gpt2 capture pin?
3. Am I missing anything to register this?

Thanks,

Phani Movva

[phaniteja]

Instead of using request_irq(), use setup_irq() call as used in linux/arch/arm/mach-imx/time.c.

For falling edge, need to configure in control register of GPT2.

[igorpadykov]

there is no limitation for using falling edge in control register of GPT2.

[igorpadykov]

Hi Phani

for gpt interrupt example one can look on linux/arch/arm/mach-imx/time.c

linux-2.6-imx.git - Freescale i.MX Linux Tree 

It may be used by linux as described in sect.3.3 Timer attached Linux Manual.

Best regards
igor
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[phaniteja]

Hello Igor,

I have registered the interrupt in the same way done in linux/arch/arm/mach-imx/time.c. But it didn't solve my issue.

   struct irqaction *act = &imxtm->act;

   act->name = "My Sensor";
   act->flags = IRQF_TRIGGER_FALLING;
   act->handler = r_irq_handler;

   setup_irq(imxtm->irq, act);

When I tried to register for falling edge I am getting same error as mentioned in my first post

Error:  genirq: Setting trigger mode 2 for irq 36 failed (irq_chip_set_type_parent+0x0/0x20)
          DRIVER_NAME: probe of 20e8000.gpio failed with error -22

I am able to register the interrupt for RISING_EDGE So I would like to know Is there any chip level limitation for FALLING_EDGE interrupt for this particular gpt2 capture2 pin?

[igorpadykov]

Hi Phani

>Is there any chip level limitation for FALLING_EDGE interrupt for this particular gpt2 capture2 pin?

what do you mean exactly ?

Best regards
igor