Tamper detection implementation in i.MX8X processor

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Tamper detection implementation in i.MX8X processor

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puneethkumar
Contributor III

Dear Team,

I am planning to implement a tamper detection in my system.

Can anyone send reference where we can understand what is the difference between active & passive tamper detection.

I have planned to use only two tamper pins for the detection.

SNVS_Tamper_In & SNVS_Tamper_Out.

I will use a 3 pin header - through my enclosure i will short the Tamper in & Tamper out pins, if anyone removes the enclosure that time the connection between tamper in & tamper out pins will be removed, so that we can identify if tamper is happened.

Please let me know whether the implementation method is proper or not

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igorpadykov
NXP Employee
NXP Employee
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igorpadykov
NXP Employee
NXP Employee

Hi puneethkumar

 

this information can be found in

Security Reference Manual for i.MX8DualX/8DualXPlus/8QuadXPlus Application Processors

 

Best regards
igor

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