TC358749xbg
maybe can refer to the link as below:
Hi
when i set 4 lanes,
the log is :
[ 42.567539] skip frame 0
what is the reason?
Customer enable the 4 lanes now, but it doesn't work normal. See the log for it. And below is what customer's problem.
使用tc358749 进行HDMI转mipi 通过csi 输入到imx8mq , 遇到使用1、2 两个 lanes csi可以正常播放图像,切换到1、2、3、4四个lanes的时候,图像就不能正常播放,imx8mq的mipi csi有接受到数据,dma已经数据从rx fifo拷贝到frame buffer, 但是后续就有继续感觉好像停止,fb1和fb2的完成中断并没有交替工作, 不知道是什么原因引起的.
用4 lanes是因为tc358749这个芯片1080p输出必须用 4 条lane,两条lane带宽不够,两条Lane只能支持到720p60.
Customer use yocto-imx8-4.14.78-1.0.0_ga .
I let customer try
assigned-clock-rates = <266000000>, <333000000>, <66000000>. But it no help. Could you help to look it. Thanks.
refer to your log file:
[drm] phy_cfg_hdp() num_lanes: 4, mode:3840x2160p60, color depth: 8-bit, encoding: 1
it seems that you set lane to 4 already, what resolution do you need? 4k@60? for imx8m, the max clock should be
assigned-clock-rates = <266000000>, <333000000>, <66000000>.
There's no "[drm] phy_cfg_hdp() num_lanes: 4, mode:3840x2160p60, color depth: 8-bit, encoding: 1" in the log file. Could you check again? This is customer used "1280,height=720".
sorry, should be " mxc-mipi-csi2_yav 30a70000.mipi_csi1: lanes: 4, name: mxc-mipi-csi2.0"
What's your meaning? Do you mean the dts wrong? Or others. Customer need use 4 lanes.
no, I mean that you board set lane to 4 correctly, have you changed anything source code besides clock? I got information that imx8mq can support 4 lanes, and app team have already tested this on the bare board successfully, did you measure the clock signal when set to assigned-clock-rates = <266000000>, <333000000>, <66000000>. ? any different?