Hi,
For testing adding a DCD Item, i modified flash_header.S to add one more DCD item to modify ENET_PALR, after the 83rd item (SabreSD, i.mx6Q):
MXC_DCD_ITEM(84, 0x021880E4, 0xFFFFFFFF)
I updated dcd_hdr and write_dcd_cmd as:
dcd_hdr: | .word 0x40a802D2 |
write_dcd_cmd: | .word 0x04A402CC |
The u-boot now fails to boot up. If i modify the 84th DCD Item to be the same as the 83rd DCD item (i.e. configuring DDR) it works.
Are there limitations to what registers can be updated by the ROM from the DCD list, or am i missing something?
thanks
解決済! 解決策の投稿を見る。
Please look at Table 8-35 (Valid DCD Address Ranges) in i.MX6Q Reference Manual.
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf?fpsp=1
Why exactly do you need to touch ENET_PALR from the DCD? What is the issue you are trying to solve?
Tarak,
You are only using 680 of the 1768 DCD bytes, so you should be fine.
But modifying the MAC address might have boot repercussions, especially if you are trying an NFS mount.
If your goal is to just modify some generic registers in the DCD, try something more benign. I do not see why you cannot change just about anything you want, in there.
Regards,
Rod.
Rod, apparently not all addresses can be accessed as indicated by Yuri's link to table 8-35.
Tarak: thank you for pointing this out to me, I was unaware of it.
Yuri: my apologies, I misunderstood your post, and did not realize it contained the answer.
Please look at Table 8-35 (Valid DCD Address Ranges) in i.MX6Q Reference Manual.
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf?fpsp=1