I'm trying to initialize the SDMA from the M4 core of the i.MX8M. I followed the steps from the "i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual", Rev. 3.1, 06/2021, pages 1101 - 1102. I configure channel 0 to copy the context data to ARM memory (i.e. channel 0 command "C0_GETCTXT"). Channel 0 seems to start and finishes as well (as indicated by STOP_STAT, contradictory with the reference manual, the SDMA_SDMA_INTR does not reflect this). However, no data seems to be written by the SDMA. I am using the TCM and even tried disabling the cache, but this doesn't influence the result.
Why is the context data not visible in ARM RAM?