Regarding i.MX6 external 32kHz detection.

[satoshishimoda]

Hello, I belong to distributor of Freescale Japan.

I have a question about i.MX6 external 32kHz detection.

Please see my questions below.

[Q1]

When i.MX6 external 32kHz clock detection circuit reset?

If you can, could you let me know what is a trigger to reset it?

[Q2]

Could you let me know the timing when i.MX6 detect 32kHz external clock and changes the clock source from internal 40kHz to external 32kHz?

[Q3]

Related to Q2, what is happen if 32kHz starts oscillation when i.MX6 detects POR_B releasing with internal 40kHz?

i.MX6 changes the clock source to 32kHz immediately?

Actually, we warry whether i.MX6 can preserve the POR_B relase detection when 32kHz starts oscillation this timing.

Best Regards,

Satoshi Shimoda

[Yuri · Accepted solution]

1.

  As for internal oscillator, general consideration are as following :

The internal boot ROM uses the general-purpose timer (GPT) as a timing reference for event and timeout measurement during the boot process. The ROM uses the 32 kHz clock as the clock source for the GPT.

There will be a short period during device power-up when the SoC will be using the internal ring oscillator until

the crystal oscillator is running. Once the crystal oscillator is running, the SoC will automatically switch from the

internal oscillator to the crystal oscillator. Consequently, there will be a period of time when the SoC will be booting and using the internal ring oscillator as its reference clock and the ROM code will be dependent on that clock.

2.

I am afraid we do not have any indicator when  the SoC  automatically switches from the

internal oscillator to the crystal oscillator. Since the internal ring oscillator is less accurate than a crystal oscillator,

it may be recommended (to avoid boot timing issues) to extend the assertion of POR_B until the 32 kHz crystal oscillator is running and stable and / or provide an external stable 32 kHz clock input prior to de-assertion of POR_B.

Have a great day,
Yuri

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[satoshishimoda]

Hi Yuri,

According to your reply, there is a possibility that a unexpected problem will be occurred if 32 kHz is not running and stable prior to de-assertion of POR_B.

Is this correct?

Best Regards,

Satoshi Shimoda

[Yuri]

"The ROM code assumes the reference clock is 32 kHz, so in the presence of a faster reference clock some delays or timeout configurations in the ROM code will be shorter than expected and may affect SD/MMC boot, NAND boot and One NAND boot."

[satoshishimoda]

Hi Yuri,

Maybe, I misunderstood about your following reply, sorry.

> I am afraid we do not have any indicator when the SoC automatically switches from the internal oscillator to the crystal oscillator. 

We don't need a indicator to confirm whether the clock source is switched from internal ring oscillator to 32kHz external crystal.

We just want to the condition "when the switching (ring oscillator -> external crystal) will be occurred".

(e.g. the clock amplitude exceeds NVCC_PLL_OUT * 0.8, and continue the amplitude over xx cycles)

The information is required to consider how log should we expand the POR_B assertion time to ERR007926 workaround.

Best Regards,

Satoshi Shimoda

[Yuri]

Hello,

  "the imx6 parts will switch to an internal oscillator if the external clock is less than
20kHz(approximately) or higher than 1MHz(approximately)."

Regards,

Yuri.