Regarding i.MX6 ECSPI frequency.

[satoshishimoda]

Hi community,

We have questions about ECSPI of i.MX6SDL.

There is "Max operation frequency up to the reference clock frequency" in Chapter 21.1.1 of Reference Manual (IMX6SDLRM Rev.1).

But we do not know it well, please tell us about the following.

[Q1]

Does "Max operation frequency" mean operating frequency of the internal ECSPI module ?

Or does it mean communication frequency with external devices connected with SPI ?

[Q2]

Which clock is "The reference clock frequency" in Table 21-6 ?

Best Regards,

Satoshi Shimoda

[Yuri · Accepted solution]

  The phrase “max operation frequency up to the reference clock frequency” means,

that SPI output frequency (SCLK) maximum value is equal to the reference clock
one, assuming pre- and post- dividers, configured in ECSPI_CONREG are zeros
(divide by 1). The reference clock is ipg_clk_per  from ecspi_clk_root in the Table 21-5.

Have a great day,
Yuri

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[satoshishimoda]

Hi Yuri,

Thank you for your reply.

OK, I understood what is said in the sentence.

By the way, according to datasheet (IMX6SDLCEC Rev.3), ECSPI SCLK cycle time should be 15 ns for write and 43 ns for read.

In the write time, 15 ns < 16.7 ns( = 1/60MHz, ipg_clk_per max frequency), so actual ECSPI write maximum SCLK cycle time is 16.7 ns, is this correct?

In the read time, 43 ns > 16.7 ns, so user should use lower frequency for ECSPI read even if the reference manual chapter 21.1.1 says “max operation frequency up to the reference clock frequency”, is this correct?

Best Regards,

Satoshi Shimoda

[Yuri]

The following FAQ clarifies the issue.

Q&amp;A: What is i.Mx6 ECSPI max frequency?

~Yuri.