Good day all.
It is my first time configuring FlexRAM. I am trying to change the FlexRAM memory allocation on the RT1170EVK board. I have followed the steps from the NXP post Reallocating the FlexRAM - NXP Community and the application note "Using the i.MX RT FlexRAM Rev 3". I would like to only use SRAM_DTC, i.e. 512kB DTCM and 0kB ITCM and 0kB OCRAM.
I have modified the following registers at their corresponding addresses (obtained from the i.MX RT1170 Processor Reference Manual Rev 1):
IOMUXC_GPR_GPR16 - 0x400E4040
IOMUXC_GPR_GPR16 - 0x400E4044
IOMUXC_GPR_GPR16 - 0x400E4048
I edited the ResetISR(void) function in 'startup_mimxrt1176_cm7.c" to be:
I replaced 'IMAGE_ENTRY_ADDRESS' in 'fsl_flexspi_nor_boot.c' with '(uint32_t)ResetISR' as per the instructions:
This resulted in a mupltiple definitions error, therefore I had to comment out 'extern uint32_t ResetISR[];' in 'fsl_flexspi_nor_boot.h':
I changed the linkerscript to correspond to the new DTC size:
And in board.c I modified the MPU (BOARD_ConfigMPU) to match the new memory sizes (based on the assumption that region 4 is the ITC and region 5 is the DTC):
With this configuration and modifications my project compiles fine:
But when debugging, my program just stalls and never offers the 'play' option:
What am I doing wrong?
Thank you for the responses.
I have tried all the above suggestions. It seems that moving the stack pointer to the start of the DTCM memory solved the problem. However, a new problem now is that I cannot debug the board more than once during its power cycle, i.e if I am doing the following it works: build -> debug (this works) -> terminate debug session, build -> debug -> error window. I then need to switch the board on and off to get this error window to dissapear: build -> debug -> terminate debug session -> switch board off -> switch board on -> build -> debug -> works.
Pressing the reset button between debug sessions did seem to rid me of turning the board on and off again, but only for single core projects. When I try to do a multicore example, such as the rpmsg_lite_pingpong_rtos example, and I use the above flexram configurtation, the 'reset' or 'turn-off and off' method does not solve a problem since a new error window occurs:
This error can only be fixed if I mass erase the board using the GUI flash tool. Clearly there is a bigger underlying problem here. Especially the flexram configuration of the M7 calling the M4.
Thank you for your responses and assistance so far.
Hello John,
I was discussing this internally with Kerry, and there are other things to take into consideration. Keep in mind that the community document was made for the RT10xx parts. The steps for the RT1170 are not the same.
In the RT1170, you don't need to modify the file fsl_flexspi_nor_boot.c. Please delete the line of code where you declared the ResetISR as extern and uncomment the line on fsl_flexspi_nor_boot.h. This step only applies to the RT10xx parts.
You also need to reallocate the stack pointer. As I mentioned in the community document, there are lots of dangerous areas in reconfiguring the FlexRAM in code. It pretty much all boils down to the fact that any code/data/stack information written to the RAM can end up changing location during the reallocation. To overcome this you'll need to place the stack at the start of the DTCM memory and change the size. This applies to all the RT parts. I'm working on updating the community document to add this information.
After doing this you also have to add a couple of instructions inside the reset handler to reallocate the SP. Here are all the instructions that you need.
/* Reallocating the FlexRAM */
__asm (".syntax unified\n"
"LDR R0, =0x20001fff\n" //Reallocating the stack pointer
"MSR MSP,R0\n"
"LDR R0, =0x400e4044\n"//Address of register IOMUXC_GPR_GPR17
"LDR R1, =0x0000aaaa\n"//FlexRAM configuration DTC = 265KB, ITC = 128KB, OC = 128KB
"STR R1,[R0]\n"
"LDR R0, =0x400e4048\n"//Address of register IOMUXC_GPR_GPR18
"LDR R1, =0x0000aaaa\n"//FlexRAM configuration DTC = 265KB, ITC = 128KB, OC = 128KB
"STR R1,[R0]\n"
"LDR R0,=0x400e4040\n"//Address of register IOMUXC_GPR_GPR16
"LDR R1,[R0]\n"
"ORR R1,R1,#4\n"//The 4 corresponds to setting the FLEXRAM_BANK_CFG_SEL bit in register IOMUXC_GPR_GPR16
"STR R1,[R0]\n"
".syntax divided\n");
__asm volatile ("MSR MSP, %0" : : "r" (&_vStackTop) : );You need to add these instructions right after disabling the interrupts inside the ResetISR.
As Kerry mentioned to you already, you also need to modify the connect script to match the new value of the FlexRAM. I will add this in the community document as well since this applies to all the RT parts.
The changes that you made in the MCU settings and the MPU are correct. I made some tests on my end, and I was able to debug this without problems.
Regards,
Victor
