 
					
				
		
hi all,
I'm currently developing a tiny boot for eeprom on imx6sl for loading u-boot from NAND SPI.
Everything is fine except I'm too lazy to re-write a DCD processor to load the u-boot DCD part.
Is there an official ROM API entry to call for this purpose ?
thanks.
Arnaud
 
					
				
		
 Yuri
		
			Yuri
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		There were several discussions about the i.MX6 ROM API (what is it, how to use). The recent recommendation is to avoid
use the ROM API (it is not well documented, it is not clear if it will not be changed in next releases).
 
					
				
		
ok fine.
anyway a DCD processor doesn't request too much space.
regards,
arnaud
 JerryFan
		
			JerryFan
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		 
					
				
		
Hello Jerry
Yes, I implemented all what I want successfully.
The DCD stuff was not complicated at all, just consuming few but important
code bytes.
Regards,
Arnaud
Le 19 août 2013 à 09:55, Chongbin Fan <b32609@freescale.com> a écrit :
<https://community.freescale.com/>
<https://community.freescale.com/> You have been mentioned
by Chongbin Fan<https://community.freescale.com/people/JerryFan?et=notification.mention>
in Re: ROM API for DCD process in Freescale Community - View Chongbin
Fan's reference to
you<https://community.freescale.com/message/345378?et=notification.mention#345378>
 
					
				
		
 fabio_estevam
		
			fabio_estevam
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Do you mean SPI flash?
If so, you can use the same DCD configuration that is used to boot from SD card:
uboot-imx.git - Freescale i.MX u-boot Tree
and just flash u-boot into offset 0x400 of your SPI Flash.
 
					
				
		
No, I really mean "SPI NAND flash" (not SPI NOR, not parallel NAND), so something which is not directly bootable by the imx6SL ROM.
That's why the first stage will be a 4KB bootloader on eeprom, knowning just enough of the bad blocks & bad bits to look for multiple copies of uboot inside this Nand.
Since I want to keep the uboot header (IVT+ DCD...) as similar as the original, it must manage DCD process and/or plugins inside this first stage, or at least, forward the process to the ROM code (through a possible ROM API)
I don't want to put the DCD part inside this 4KB, since:
- 4KB is already very small
- if possible, I don't want to update this first stage when the DDR parameters will need to change (experience shows It can be frequent...)
Regards,
Arnaud
