Question regarding i.MX6 IPU display interface scan order

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Question regarding i.MX6 IPU display interface scan order

1,665件の閲覧回数
liuhao
Contributor I

I am new to i.MX6 and currently I am reading i.MX6 datasheet (iMX6DQPRM.pdf) and I have a question regarding IPU display interface (DI). In chapter 37.1.2.1.2.2 Display Interface, it mentioned:

The interface includes the following additional features:
• Screen size: up to 4096 x 2048 pixels, programmable by software.
• Scan Order: progressive or interlaced
• Synchronization
• Programmable horizontal and vertical synchronization output signals (for
synchronous access)
• Data enabling output signal
• Software contrast control using 8-bit programmable pulse-width modulation (PWM)
Two dedicated PWM outputs are provided

The video data in memory is progressive 30 fps 24 bits RGB data in memory. However I would like to output interlaced video signal via a TV encoder. Therefore I would like to output interlaced RGB data to display interface. Can I use scan order of interlaced to do this?

Also, each IPU has two display interface. Can I use scan order interlaced to one display interface and progressive to another display interface?

Many thanks in advance.

ラベル(5)
0 件の賞賛
返信
2 返答(返信)

1,397件の閲覧回数
qiang_li-mpu_se
NXP Employee
NXP Employee

Yes, it can be supported, the interlaced display patch: Patch for iMX6 BSP to support interlaced display on HDMI and LCD interface

0 件の賞賛
返信

1,398件の閲覧回数
liuhao
Contributor I

Thank you very much for the info. Very helpful.

0 件の賞賛
返信