Question, i.MX6UL BENAND

[Aemj]

Dear team,

My customer want to use the following Toshiba/BENAND chip with i.MX6UltraLite.

TC58BVG0S3HTAI0（BENAND）

Could you check whether the BENAND chip can be used with i.MX6UL?

Please find the attached file for the datasheet of the BENAND.

And please find the another attached file, the BENAND has a restriction on its programming.

Thanks,

Miyamoto

[Yuri]

Hello,

   TC58BVG0S3HTAI0 has embedded ECC, and  I am afraid, it is practically impossible to use "smart"

NAND with on-die ECC enabled for boot, since i.MX6 GPMI controller is intended to work with "raw"

parts, assuming specific NAND blocks mapping : any NAND is treated as sequence of 512-bytes blocks

with following spare areas. The ''smart' NANDs use own (different) mapping.

    Please look at section 8.5.2.5 (Bad Block Handling in the ROM) of the I.MX6UL RM (IMX6ULRM,

Rev. 0, 08/2015) for NAND data mapping. As for ECC - section 8.5.2.2 [NAND Flash Boot Flow and Boot

Control Blocks  (BCB)] describes BCB structures and states about ECC protection, using the internal

hardware.

   Possible solution – my opinion – applying boot SPI NOR; so that NOR code configures

BENAND part to disable its ECC (if possible).

Have a great day,
Yuri

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[Aemj]

Hi Yuri,

Thanks for your comment.

After boot-up, is it possible to disable ECC function on i.MX6UL by clearing GPMI_ECCCTRL[ENABLE_ECC] bit?

What do you think about the use as storage device, not for boot device?

Thanks,

Miyamoto

[Yuri]

Hi,

   I am afraid, it is impossible to use the NAND as a storage device with its internal ECC.

The reason concerns specific NAND layout, used by GPMI, where 512-byte blocks are located

with the following spare areas (just after data block). This does not meet layout of the BENAND

part; as result ECC area of BENAND is mixed with data, expected by the GPMI.

  
     But it would be possible to use the BENAND part if its internal ECC is disabled.

Regards,

Yuri.