Question, i.MX6SoloLite power-on sequence

[Aemj]

Dear team,

I would like to ask about power-on sequence of i.MX6SL.

Are there any restriction on the order of rising of VDD_HIGH_IN and NVCC_1V8?

My customer thinks as below.

VDD_HIGH_IN and NVCC_1V8 should rise during POR=L, and there is no matter whether the order of the rises is VDD_HIGH_IN, NVCC_1V8 or vice versa.

Is it true?

Thanks,

Miyamoto

[igorpadykov]

Hi Miyamoto

>VDD_HIGH_IN and NVCC_1V8 should rise during POR=L, and there is no matter

>whether the order of the rises is VDD_HIGH_IN, NVCC_1V8 or vice versa.

this is right based on datasheet requirements, however to avoid possible power supply

glitches during power-up it is recommended first to power-up VDD_HIGH_IN as it

controls internal power regulators circuitry.

Best regards

igor

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