Power-Down Sequence i.MX6ULL

[ban45]

Hi

Power-Down Sequence i.MX6ULL

i.MX 6ULL Applications Processors for Industrial Products, Rev. 1.2, 11/2017

4.2.2 Power-Down Sequence
The following restrictions must be followed:
• VDD_SNVS_IN supply must be turned off after any other power supply.
• If a coin cell is used to power VDD_SNVS_IN, then ensure that it is removed after any other supply
is switched off.
• VDD_HIGH_IN should be turned off after VDD_SOC_IN is switched off.

It was listed for the above.

What happens if you don't follow the sequence?

How long is the sequence time interval?

Is it necessary to take measures against momentary interruptions such as power outages?

[Yuri]

@ban45 
Hello,

    generally it is possible to turn off the power at the same time, assuming the i.MX6 SRTC
is not used. I do not think, that the i.MX6 lifetime will be affected significantly in such case.

Regards,
Yuri.

[Yuri]

@ban45 
Hello,

   Power down sequence may be controlled by a PMIC.
According to section 10.7 (Regulator power-down sequencer)
of PF1510 Datasheet: The power-down sequencer performs the
functional opposite to the power-upsequencer.

https://www.nxp.com/docs/en/data-sheet/PF1510.pdf

  Also, power down sequence depends on decoupling and bulk caps, therefore
Table 9 (Power supply decoupling recommendations) of the Hardware Development
Guide should be taken into account. 

 http://www.nxp.com/assets/documents/data/en/user-guides/IMX6ULLHDG.pdf

Regards,
Yuri.

[mrudang_shelat]

Hi @ban45 

Q: What happens if you don't follow the sequence?

Ans: Refer HDG for the same. Please see attached image for reference.

Q: How long is the sequence time interval?

Ans: you can get the time interval from the PMIC datasheet.

Q: Is it necessary to take measures against momentary interruptions such as power outages?

Ans: Not actually If you have already checked and tested earlier.

Regards,

Mrudang

[ban45]

Hi

I understand the Power-up sequence.

but,There is no description about the Power-down sequence.

Do you think it's the same as a Power-down sequence？（power-up sequence guideline.JPG）

Does the decoupling capacitor change the fall time of SNVS, VDD_SOC_IN, and DD_HIGH_IN?

Is it okay to use a decoupling capacitor to change the Powerdown sequences time if the power suddenly turns off?

[Yuri]

@ban45 
Hello,

   Incorrect power down sequence may affect i.MX6 lifetime.

It is possible to use a decoupling capacitor for power down regulating.

Regards,
Yuri.

[ban45]

This is an additional question.

Is it okay to turn off the power at the same time?(Other than SNVS)

What happens to the device in that case?

If the power down sequence cannot be executed

Will the device be destroyed or Will the life of the device be shortened?

No matter what power supply you use
If the input voltage of the power supply drops instantly, the sequence cannot be followed.

I considered using a capacitor, but the current value is not constant, so it may reverse.

Is there a recommended way to deal with it?

"VDD_HIGH_IN should be turned off after VDD_SOC_IN is swiched off"
There is a description for the above.

In the block diagram of the MCIMX6ULL-cm evaluation board(SPF-29364_A1.pdf)

, VDD_SOC_IN and VDD_HIGH_IN appear to be reversed.

Even if the power supply 5V drops to 0V instantly, it drops from 3.3V,

so it seems that the sequence cannot be protected.
Please let me know if you have the know-how to protect the power down sequence.

Isn't the power-down sequence an operation that protects the processing of software?
What kind of damage can occur to the device?