Hello,
The i.MX6 SX RM, Rev. 1, 6/2016, is correct.
CSI_HSYNC , pin L20 in ALT3 mode is UART4_RTS_B, configured via
Pad Mux Register IOMUXC_SW_MUX_CTL_PAD_CSI_HSYNC.
CSI_VSYNC, pin U19 in ALT3 mode is UART4_CTS_B, configured via
Pad Mux Register IOMUXC_SW_MUX_CTL_PAD_CSI_VSYNC.
As for connections between internal UART module signals and external
SOC pins , please look at Figure 65-2 (UART external signals to module signals
routing with respect to DCE/DTE mode) of IMX6 SX RM.
Have a great day,
Yuri
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