NAND FLASH

[hajimohammed]

Hi,

   Below are the details of my platform,

       Device -  IMX6UL

       U-boot - 2015-04

       Kernel - Linux-3.14.38

We are using 2GB NAND flash which is using two chip select. One Chip Select is to select 1GB size of the flash and 2nd Chip Select is to select remaining 1GB size of the flash. Please let me know what configuration need to be done in uboot and Kernel Image

Awaiting your reply !!

[weidong_sun]

Hello hajimohammed,

    Our imx6qdl Sabre AI board, NAND Flash are supported, you can refer to it's configuration in dts, see imx6qdl-sabreauto.dtsi, below is parts of corresponding source code for NAND on sabre AI board.

...

&gpmi {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_gpmi_nand>;
    status = "disabled"; /* pin conflict with uart3 */
    nand-on-flash-bbt;
};

...

        pinctrl_gpmi_nand: gpminandgrp {
            fsl,pins = <
                MX6QDL_PAD_NANDF_CLE__NAND_CLE        0xb0b1
                MX6QDL_PAD_NANDF_ALE__NAND_ALE        0xb0b1
                MX6QDL_PAD_NANDF_WP_B__NAND_WP_B    0xb0b1
                MX6QDL_PAD_NANDF_RB0__NAND_READY_B    0xb000
                MX6QDL_PAD_NANDF_CS0__NAND_CE0_B    0xb0b1
                MX6QDL_PAD_NANDF_CS1__NAND_CE1_B    0xb0b1
                MX6QDL_PAD_SD4_CMD__NAND_RE_B        0xb0b1
                MX6QDL_PAD_SD4_CLK__NAND_WE_B        0xb0b1
                MX6QDL_PAD_NANDF_D0__NAND_DATA00    0xb0b1
                MX6QDL_PAD_NANDF_D1__NAND_DATA01    0xb0b1
                MX6QDL_PAD_NANDF_D2__NAND_DATA02    0xb0b1
                MX6QDL_PAD_NANDF_D3__NAND_DATA03    0xb0b1
                MX6QDL_PAD_NANDF_D4__NAND_DATA04    0xb0b1
                MX6QDL_PAD_NANDF_D5__NAND_DATA05    0xb0b1
                MX6QDL_PAD_NANDF_D6__NAND_DATA06    0xb0b1
                MX6QDL_PAD_NANDF_D7__NAND_DATA07    0xb0b1
                MX6QDL_PAD_SD4_DAT0__NAND_DQS        0x00b1
            >;
        };

...

Have a great day,
TIC  Weidong Sun

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