MMU page table location

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MMU page table location

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elijahbrown
Contributor III

I've noticed that in the Freescale bare metal SDK, the MMU's page table is located in the first 16k of OCRAM starting at 0x900000.  If you look at the processor reference manual for IMX6D/Q however, in figure 8.3 it shows the MMU table starting at 0x938000.  Obviously the SDK works so it seems like the manual is wrong, but I'd like to get clarification on this.  Thanks! 

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Elijah

for i.MX6QD OCRAM range is 0x900000-0x93FFFF,

MMU can be assigned to any address, this depends on application.

iROM use one ranges, SDK other, Linux may have another choices.

Best regards

igor

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Elijah

for i.MX6QD OCRAM range is 0x900000-0x93FFFF,

MMU can be assigned to any address, this depends on application.

iROM use one ranges, SDK other, Linux may have another choices.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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elijahbrown
Contributor III

Ok I see, I missed the line where it writes the address to TTBR0.  Thanks. 

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