The typical usage scenario of the i.MX6 series processors implies the use of 4
DDR3 chips, located on both sides of the PCB and routed with T topology, that
does not require the VTT termination. That's why no pre-programmed MMPF0100
configuration, supporting the VTT feature, is provided. To implement the VTT
feature, a custom OTP configuration should be programmed to the NP version of
MMPF0100 at board production stage.
Have a great day,
Artur
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