MIPI Display to IMX8 MQ

[kishorepoojari]

Dear All,

We have connected MIPI display to imx8 MQ, We are concern like panel information along with display-timing parameter shall be defined in in dts file. whether panel and display parameter shall be defined in mipi_dsi node or mipi_dsi_bridge node.

MIPI display runs on frequency 77.94 MHZ, Is it possible to provide the clock in the Kernel version (4.14.98-gb6ce727-dirty)?

If we connect MIPI display to imx8 MQ via MIPI interface what is need to mipi_dsi_bridge node?

dcss -> mipi_dsi -> mipi_dsi_bridge (define display-timings parameter)?

Regards,

Kishore P

[kishorepoojari]

Dear Jamesbone,

Thanks for the information, We have 2 problem (Kernel Version :4.14.98) ,

1. Our custom display works at the clock rate 77.94 MHZ, But we are unable to set the clock at the required frequency. If  we set the clock at 77.94 MHZ we are getting below Error.

[    1.784154] imx-drm display-subsystem: bound imx-dcss-crtc.0 (ops dcss_crtc_ops)
[    1.791665] nwl_dsi-imx mipi_dsi@30A00000: Using DCSS as input source
[    1.798870] nwl-mipi-dsi 30a00000.mipi_dsi_bridge: [drm:nwl_dsi_host_attach] lanes=4, format=0x0 flags=0x415
[    1.808957] imx-drm display-subsystem: bound mipi_dsi@30A00000 (ops imx_nwl_dsi_component_ops)
[    1.817634] [drm] Cannot find any crtc or sizes

2. If we set the Clock at 80 MHZ command are sent via MIPI interface (Display is not responding right now), We are getting below error.

[    1.820041] imx-drm display-subsystem: bound imx-dcss-crtc.0 (ops dcss_crtc_ops)
[    1.827551] nwl_dsi-imx mipi_dsi@30A00000: Using DCSS as input source
[    1.834752] nwl-mipi-dsi 30a00000.mipi_dsi_bridge: [drm:nwl_dsi_host_attach] lanes=4, format=0x0 flags=0x415
[    1.844818] imx-drm display-subsystem: bound mipi_dsi@30A00000 (ops imx_nwl_dsi_component_ops)
[    2.615899] panel-auo-ili2117a 30a00000.mipi_dsi_bridge.0: [drm:rad_panel_enable] *ERROR*
[    2.615899]  Send MCS success
[    2.655974] Console: switching to colour frame buffer device 90x80
[    2.708295] imx-drm display-subsystem: fb0:  frame buffer device

Please help us to solve the issue.

Regards,

Kishore P

[jamesbone]

It is correct, the DCSS  is the module that generates the configuration parameters of the MIPI DSI BRIDGE so your path

dcss -> mipi_dsi -> mipi_dsi_bridge