MIMRXT1062 crash with external flash

[filo96]

Processor: MIMXRT1062CVL5

External flash memory: W25Q512JV

Hello,

We are creating a project that uses the LVGL library to display a GUI on a monitor, so we need an external flash memory to store this big quantity of data.

In particular, we use a 64MB Winbond flash memory interfaced with the microcontroller.

The system was working well until the project started to increase in size. In particular when I flash the microcontroller with the debugger it shows me a Hard fault error. It stops the execution at the startup, so it isn't a code issue.

We suspect that it has been generated by the memory configuration, so I attach also the Memory details:

Type	Name	Alias	Location	Size	Driver
Flash	BOARD_FLASH	Flash	0x60000000	0x4000000	MIMXRT1060_SFDP_QSPI.cfx
RAM	BOARD_DRAM	RAM	0x80000000	0x1e00000
RAM	NCACHE_REGION	RAM2	0x81e00000	0x200000
RAM	SRAM_DTC	RAM3	0x20000000	0x20000
RAM	SRAM_ITC	RAM4	0x0	0x20000
RAM	SRAM_OC	RAM5	0x20200000	0xc0000

I've only been able to understand that:

1. If we use only pictures, without any touchscreen management, the final used size of BOARD_FLASH is only 0.85%. The system starts and shows the GUI.
2. If we enable the touchscreen management functions, which coordinate the various interactions with the GUI, the final used size of BOARD_FLASH is 24.45%. The system crashes as showed previously.

Any help would be apprectiated!

[kerryzhou]

Hi @filo96 ,

   Please also share the build result picture, I need to check the memory used percent information.

   I mean, something like this:

Answer your questions:

1 If we use only pictures, without any touchscreen management, the final used size of BOARD_FLASH is only 0.85%. The system starts and shows the GUI.

=>Answer: So, this point is working, no issues.

2 If we enable the touchscreen management functions, which coordinate the various interactions with the GUI, the final used size of BOARD_FLASH is 24.45%. The system crashes as showed previously.

=>Answer: BOARD_FLASH is 24.45%,this should still OK, please try to disable the cache, whether any improvement or not? Do you just use the flash memory, not other RAM? Whether the RAM is overflow or not?

Best Regards,

Kerry

[filo96]

Hello,

We are using an external 30MB RAM chip, as you can see from the log. So there is a sufficient amount of RAM memory.

Memory region         Used Size  Region Size  %age Used
     BOARD_FLASH:    16405264 B        64 MB     24.45%
     BOARD_SDRAM:     1904512 B        30 MB      6.05%
   NCACHE_REGION:        5600 B         2 MB      0.27%
        SRAM_DTC:          0 GB       128 KB      0.00%
        SRAM_ITC:        5184 B       128 KB      3.96%
         SRAM_OC:          0 GB       768 KB      0.00%
Finished building target: evkmimxrt1060_lvgl_guider_test2.axf

"please try to disable the cache, whether any improvement or not? Do you just use the flash memory, not other RAM? Whether the RAM is overflow or not?"

The "I cache" and "D cache" are enabled. How could I disable them?

[kerryzhou]

Hi @filo96 ,

void BOARD_ConfigMPU(void)

In the API end:

SCB_EnableDCache();
SCB_EnableICache();

Change it to:

SCB_DisableDCache();
SCB_DisableICache();

Then test it again, any improvement or not?

Best Regards,

kerry

[filo96]

I made the following changes:

SCB_EnableDCache(); to SCB_DisableDCache();

SCB_EnableICache(); to SCB_DisableICache();

But it stops at the same Program Counter's line as previously mentioned. Hence I think this is not due to caches.

[kerryzhou]

Hi @filo96 ,

  Thanks for your updated information.

   You mentioned: The system was working well until the project started to increase in size.

  When it was working well, whether you also use the SDRAM above the ITCM and DTCM? Just want to check whether it is related to the SDRAM.

  Can you try to comment some code, and let it working, then add more data in the flash,eg, constant, whether it can reproduce the issues or not?

  Can you reproduce the issues on the EVK, even with your used QSPI flash?

  I just want to check, whether I can reproduce your issues or not.

Best Regards,

Kerry

[filo96]

Hi @kerryzhou,

I've been able to remove a lot of code, and now I can discriminate two conditions:

WORKING CODE - output log:

Memory region         Used Size  Region Size  %age Used
     BOARD_FLASH:     8129056 B        64 MB     12.11%
     BOARD_SDRAM:     1905888 B        30 MB      6.06%
   NCACHE_REGION:        5600 B         2 MB      0.27%
        SRAM_DTC:          0 GB       128 KB      0.00%
        SRAM_ITC:        5464 B       128 KB      4.17%
         SRAM_OC:          0 GB       768 KB      0.00%
Finished building target: evkmimxrt1060_lvgl_guider_test2.axf

NOT WORKING CODE (crash during startup) - output log:

Memory region         Used Size  Region Size  %age Used
     BOARD_FLASH:     8496112 B        64 MB     12.66%
     BOARD_SDRAM:     1905888 B        30 MB      6.06%
   NCACHE_REGION:        5600 B         2 MB      0.27%
        SRAM_DTC:          0 GB       128 KB      0.00%
        SRAM_ITC:        5464 B       128 KB      4.17%
         SRAM_OC:          0 GB       768 KB      0.00%
Finished building target: evkmimxrt1060_lvgl_guider_test2.axf

I'm not 100% sure, but the error seems to appear when I exceed 8MB (8388608 bytes).

Do you think it could be an issue due to wrong memory mapping? Maybe it's not suffient to change this Memory setup (before it wasn't 64MB but, I remember, it was 8MB), but there are also other settings to be changed.

Thank you for your patience.

[kerryzhou]

Hi @filo96 ,

   Thanks a lot for your effort.

    Now, please do this testing based on the working code.

   As you mentioned, it seems the code larger than 8MB,the issue occur, so, the working code still not exceed, right?

   If yes, please add some const array, just let the code larger than 8MB, as this const array just consume the flash, not the internal RAM,  you can try it, whether the issue appears?

  If not appear, please test your issue project, change the stack and heap size, whether some improve or not?

Best Regards,

Kerry

[filo96 · Accepted solution]

Hi,

I'm going to update you. Maybe I finally solved the problem, but I'd like to know if this is correct.

1) SOLVE THE PROBLEM OF SIZE GREATER THAN 8MB OF FLASH

Inside the file in xip\evkmimxrt1060_flexspi_nor_config.c there is a struct const variabile named 

qspiflash_config where I changed:

.sflashA1Size         = 8u * 1024u * 1024u,

to

.sflashA1Size         = 64u * 1024u * 1024u,

With this edit, I've been able to use a size greater than 8MB. However I discovered a new limit that is 16MB.

So, I wasn't able to write more than 16MB in a 64MB of flash.

2) SOLVE THE PROBLEM OF SIZE GREATER THAN 16MB OF FLASH

Inside the same variable in the file in xip\evkmimxrt1060_flexspi_nor_config.c I changed:

.lookupTable =
    {
        // Read LUTs
        [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
        [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),

        // Read Status LUTs
        [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),

        // Write Enable LUTs
        [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),

        // Erase Sector LUTs
        [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20, RADDR_SDR, FLEXSPI_1PAD, 0x18),

        // Erase Block LUTs
        [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8, RADDR_SDR, FLEXSPI_1PAD, 0x18),

        // Pape Program LUTs
        [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x02, RADDR_SDR, FLEXSPI_1PAD, 0x18),
        [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),

        // Erase Chip LUTs
        [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
    },

to

.lookupTable =
    {
        // Read LUTs
        [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEC, RADDR_SDR, FLEXSPI_4PAD, 0x20),
        [1] = FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),

        // Read Status LUTs
        [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05, READ_SDR, FLEXSPI_1PAD, 0x04),

        // Write Enable LUTs
        [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06, STOP, FLEXSPI_1PAD, 0x0),

        // Erase Sector LUTs
        [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x21, RADDR_SDR, FLEXSPI_1PAD, 0x20),

        // Erase Block LUTs
        [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xDC, RADDR_SDR, FLEXSPI_1PAD, 0x20),

        // Pape Program LUTs
        [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x12, RADDR_SDR, FLEXSPI_1PAD, 0x20),
        [4 * 9 + 1] = FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_1PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),

        // Erase Chip LUTs
        [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x60, STOP, FLEXSPI_1PAD, 0x0),
    },

This permits to accept the use of the 4 byte addressing of the QSPI flash (instead of the 3 bytes as default).

Then, I changed the const variable customLUT in the file source\flexspi_nor_polling_transfer.c I changed:

const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {
    /* Normal read mode -SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x03, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Fast read mode - SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0B, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ(
        kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Fast read quad mode - SDR */
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xEB, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_4PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ(
        kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x06, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04),

    /* Read extend parameters */
    [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Write Enable */
    [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Erase Sector  */
    [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x20, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),

    /* Page Program - single mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x02, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Page Program - quad mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x32, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18),
    [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Read ID */
    [4 * NOR_CMD_LUT_SEQ_IDX_READID] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x9F, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Enable Quad mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x31, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04),

    /* Enter QPI mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_ENTERQPI] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x35, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Exit QPI mode */
    [4 * NOR_CMD_LUT_SEQ_IDX_EXITQPI] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_4PAD, 0xF5, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

    /* Read status register */
    [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

    /* Erase whole chip */
    [4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] =
        FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
};

to

const uint32_t customLUT[CUSTOM_LUT_LENGTH] = {
        /* Normal read mode -SDR */
        [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x13, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20),
        [4 * NOR_CMD_LUT_SEQ_IDX_READ_NORMAL + 1] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

        /* Fast read mode - SDR */
        [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x0C, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20),
        [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST + 1] = FLEXSPI_LUT_SEQ(
            kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

        /* Fast read quad mode - SDR */
        [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x6C, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20),
        [4 * NOR_CMD_LUT_SEQ_IDX_READ_FAST_QUAD + 1] = FLEXSPI_LUT_SEQ(
            kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_4PAD, 0x08, kFLEXSPI_Command_READ_SDR, kFLEXSPI_4PAD, 0x04),

        /* Read extend parameters */
        [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUS] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x81, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

        /* Write Enable */
        [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x06, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

        /* Erase Sector  */
        [4 * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xDC, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20),

        /* Page Program - single mode */
        [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x12, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20),
        [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_SINGLE + 1] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

        /* Page Program - quad mode */
        [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x34, kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x20),
        [4 * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM_QUAD + 1] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_4PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

        /* Read ID */
        [4 * NOR_CMD_LUT_SEQ_IDX_READID] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xAB, kFLEXSPI_Command_DUMMY_SDR, kFLEXSPI_1PAD, 0x20),
        [4 * NOR_CMD_LUT_SEQ_IDX_READID + 1] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

        /* Enable Quad mode */
        [4 * NOR_CMD_LUT_SEQ_IDX_WRITESTATUSREG] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x01, kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x04),

        /* Enter QPI mode */
        [4 * NOR_CMD_LUT_SEQ_IDX_ENTERQPI] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x35, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

        /* Exit QPI mode */
        [4 * NOR_CMD_LUT_SEQ_IDX_EXITQPI] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_4PAD, 0xF5, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

        /* Read status register */
        [4 * NOR_CMD_LUT_SEQ_IDX_READSTATUSREG] =
            FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x05, kFLEXSPI_Command_READ_SDR, kFLEXSPI_1PAD, 0x04),

		/* Erase whole chip */
		[4 * NOR_CMD_LUT_SEQ_IDX_ERASECHIP] =
			FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0xC7, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),
};

With this edit, the QSPI flash loader is able to program the entire memory.

Hence the firmware seems to work, also when using a huge amount of flash memory (e.g. 40 MB).

Do you think it's right?

[filo96]

At the moment I can only look at some of your points.

Firstly, when it works, I cache and D cache are enabled.

This is the output log message:

Memory region         Used Size  Region Size  %age Used
     BOARD_FLASH:      572528 B        64 MB      0.85%
     BOARD_SDRAM:     1903072 B        30 MB      6.05%
   NCACHE_REGION:        5600 B         2 MB      0.27%
        SRAM_DTC:          0 GB       128 KB      0.00%
        SRAM_ITC:        5184 B       128 KB      3.96%
         SRAM_OC:          0 GB       768 KB      0.00%
Finished building target: evkmimxrt1060_lvgl_guider_test2.axf

At the moment I don't have an EVK board, so I cannot try to reproduce the error.

I could exclude some parts of code until it crashes, it's what I tried and what I'll continue to try. I'll update you.

EDIT: I noticed that in "board.h" there is

#define BOARD_FLASH_SIZE (0x800000U)

so I changed it to

#define BOARD_FLASH_SIZE (0x4000000U)

but the error persists...