Linux 3.10.17 i.MX6S SOLO boot problem

[marcocavallini]

Hello,

I am trying to port Linux version 3.10.17 to an i.MX6 SOLO (Not Solo Lite)

I started from the imx6q-sabresd configuration as foudation for the first test

  make imx_v7_defconfig

  make -j4 uImage LOADADDR=0x10008000

  make imx6q-sabresd.dtb

Is this the correct way to proceed for MX6 SOLO ?

The problem is that kernel hangs at the line below just after trying to mount the mmcblk0

Sometimes some messages appear but they don't give much information.

I need a help to understand where to dig in order to continue the boot process.

Thank you

[BOOT LOG]

Booting Linux on physical CPU 0x0

Linux version 3.10.17+g232293e (koan@kmobile) (gcc version 4.8.2 (GCC) ) #46 SMP PREEMPT Sun Mar 1 16:04:32 CET 2015

CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d

CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache

Machine: Freescale i.MX6 Quad/DualLite (Device Tree)

cma: CMA: reserved 320 MiB at 3a000000

Memory policy: ECC disabled, Data cache writealloc

PERCPU: Embedded 9 pages/cpu @816f2000 s12992 r8192 d15680 u36864

Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 260096

Kernel command line: console=ttymxc0,115200 maxcpus=1 root=/dev/mmcblk1p2 rootwait rw

PID hash table entries: 4096 (order: 2, 16384 bytes)

Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)

Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)

Memory: 1024MB = 1024MB total

Memory: 695876k/695876k available, 352700k reserved, 0K highmem

Virtual kernel memory layout:

    vector  : 0xffff0000 - 0xffff1000   (   4 kB)

    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)

    vmalloc : 0xc0800000 - 0xff000000   (1000 MB)

    lowmem  : 0x80000000 - 0xc0000000   (1024 MB)

    pkmap   : 0x7fe00000 - 0x80000000   (   2 MB)

    modules : 0x7f000000 - 0x7fe00000   (  14 MB)

      .text : 0x80008000 - 0x80d60358   (13665 kB)

      .init : 0x80d61000 - 0x80de42c0   ( 525 kB)

      .data : 0x80de6000 - 0x80e54670   ( 442 kB)

       .bss : 0x80e54670 - 0x80edf36c   ( 556 kB)

SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1

Preemptible hierarchical RCU implementation.

  RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=1.

NR_IRQS:16 nr_irqs:16 16

L310 cache controller enabled

l2x0: 16 ways, CACHE_ID 0x410000c8, AUX_CTRL 0x32050000, Cache size: 524288 B

sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 1431655ms

CPU identified as i.MX6DL, silicon rev 1.1

Console: colour dummy device 80x30

Calibrating delay loop... 1581.05 BogoMIPS (lpj=7905280)

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 512

CPU: Testing write buffer coherency: ok

ftrace: allocating 23648 entries in 70 pages

CPU0: thread -1, cpu 0, socket 0, mpidr 80000000

Setting up static identity map for 0x806d1848 - 0x806d18a0

Brought up 1 CPUs

SMP: Total of 1 processors activated (1581.05 BogoMIPS).

CPU: All CPU(s) started in SVC mode.

devtmpfs: initialized

pinctrl core: initialized pinctrl subsystem

regulator-dummy: no parameters

NET: Registered protocol family 16

DMA: preallocated 256 KiB pool for atomic coherent allocations

Use WDOG2 as reset source

syscon 20c8000.anatop: regmap [mem 0x020c8000-0x020c8fff] registered

vdd1p1: 800 <--> 1375 mV at 1125 mV

vdd3p0: 2800 <--> 3150 mV at 3000 mV

vdd2p5: 2000 <--> 2750 mV at 2425 mV

cpu: 725 <--> 1450 mV at 1150 mV

vddpu: 725 <--> 1450 mV at 1150 mV

vddsoc: 725 <--> 1450 mV at 1175 mV

syscon 20e0000.iomuxc-gpr: regmap [mem 0x020e0000-0x020e0037] registered

syscon 21bc000.ocotp-ctrl: regmap [mem 0x021bc000-0x021bffff] registered

hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.

hw-breakpoint: maximum watchpoint size is 4 bytes.

imx6q-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver

bio: create slab <bio-0> at 0

mxs-dma 110000.dma-apbh: initialized

i2c-core: driver [max17135] using legacy suspend method

i2c-core: driver [max17135] using legacy resume method

SCSI subsystem initialized

usbcore: registered new interface driver usbfs

usbcore: registered new interface driver hub

usbcore: registered new device driver usb

pps_core: LinuxPPS API ver. 1 registered

pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

PTP clock support registered

imx-ipuv3 2400000.ipu: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)

imx-ipuv3 2800000.ipu: IPU DMFC NORMAL mode: 1(0~1), 5B(4,5), 5F(6,7)

MIPI CSI2 driver module loaded

Advanced Linux Sound Architecture Driver Initialized.

cfg80211: Calling CRDA to update world regulatory domain

Switching to clocksource mxc_timer1

NET: Registered protocol family 2

TCP established hash table entries: 8192 (order: 4, 65536 bytes)

TCP bind hash table entries: 8192 (order: 4, 65536 bytes)

TCP: Hash tables configured (established 8192 bind 8192)

TCP: reno registered

UDP hash table entries: 512 (order: 2, 16384 bytes)

UDP-Lite hash table entries: 512 (order: 2, 16384 bytes)

NET: Registered protocol family 1

RPC: Registered named UNIX socket transport module.

RPC: Registered udp transport module.

RPC: Registered tcp transport module.

RPC: Registered tcp NFSv4.1 backchannel transport module.

hw perfevents: enabled with ARMv7 Cortex-A9 PMU driver, 7 counters available

pureg-dummy: no parameters

imx6_busfreq busfreq.15: busfreq_probe: failed to get axi_sel_clk

imx6_busfreq: probe of busfreq.15 failed with error -2

Bus freq driver module loaded

VFS: Disk quotas dquot_6.5.2

Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)

NFS: Registering the id_resolver key type

Key type id_resolver registered

Key type id_legacy registered

jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.

fuse init (API version 7.22)

msgmni has been set to 1999

io scheduler noop registered

io scheduler deadline registered

io scheduler cfq registered (default)

imx-weim 21b8000.weim: WEIM driver registered.

MIPI DSI driver module loaded

imx-sdma 20ec000.sdma: no iram assigned, using external mem

imx-sdma 20ec000.sdma: initialized

imx-sdma 20ec000.sdma: loaded firmware 1.1

Serial: IMX driver

2020000.serial: ttymxc0 at MMIO 0x2020000 (irq = 58) is a IMX

console [ttymxc0] enabled

serial: Freescale lpuart driver

[drm] Initialized drm 1.1.0 20060810

[drm] Initialized vivante 1.0.0 20120216 on minor 0

brd: module loaded

loop: module loaded

lkdtm: No crash points registered, enable through debugfs

m25p80 spi32766.0: found mr25h256, expected m25p32

m25p80 spi32766.0: mr25h256 (32 Kbytes)

spi_imx 2008000.ecspi: probed

CAN device driver interface

libphy: fec_enet_mii_bus: probed

fec 2188000.ethernet eth0: registered PHC device 0

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver

usbcore: registered new interface driver usb-storage

ci_hdrc ci_hdrc.0: doesn't support gadget

ci_hdrc ci_hdrc.0: EHCI Host Controller

ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1

ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00

hub 1-0:1.0: USB hub found

hub 1-0:1.0: 1 port detected

mousedev: PS/2 mouse device common for all mice

i2c-core: driver [isl29023] using legacy suspend method

i2c-core: driver [isl29023] using legacy resume method

snvs_rtc 20cc034.snvs-rtc-lp: rtc core: registered 20cc034.snvs-rtc-lp as rtc0

i2c /dev entries driver

i2c-core: driver [mag3110] using legacy suspend method

i2c-core: driver [mag3110] using legacy resume method

imx2-wdt 20bc000.wdog: IMX2+ Watchdog Timer enabled. timeout=60s (nowayout=0)

cpuidle: using governor ladder

cpuidle: using governor menu

sdhci: Secure Digital Host Controller Interface driver

sdhci: Copyright(c) Pierre Ossman

usbcore: registered new interface driver ushc

sdhci-pltfm: SDHCI platform and OF driver helper

mmc0: no vqmmc regulator found

mmc0: no vmmc regulator found

mmc0: SDHCI controller on 2198000.usdhc [2198000.usdhc] using ADMA

mmc0: mmc_rescan_try_freq: trying to init card at 400000 Hz

mmc0: host does not support reading read-only switch. assuming write-enable.

mmc0: new high speed SD card at address 59b4

mmcblk0: mmc0:59b4 USD   1.87 GiB

(usually hangs here)

...

(but sometimes the boot continue in this way)

Unable to handle kernel paging request at virtual address afff0000

pgd = 80004000

[afff0000] *pgd=4ffcf801, *pte=00000000, *ppte=00000000

Internal error: Oops: 807 [#1] PREEMPT ARM

Modules linked in:

CPU: 0 PID: 1 Comm: swapper Not tainted 3.10.17+g232293e #14

task: a805a000 ti: a806c000 task.ti: a806c000

PC is at __memzero+0x24/0x80

LR is at 0x0

pc : [<80264cc4>]    lr : [<00000000>]    psr: 20000113

sp : a806dd6c  ip : 00000000  fp : 00000000

r10: a80c4610  r9 : a806ddbc  r8 : 00008000

r7 : 00000047  r6 : 8113b000  r5 : 08000000  r4 : aa500000

r3 : 00000000  r2 : 00000000  r1 : 0250ffc0  r0 : afff0000

Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment kernel

Control: 10c53c7d  Table: 10004059  DAC: 00000015

Process swapper (pid: 1, stack limit = 0xa806c230)

Stack: (0xa806dd6c to 0xa806e000)

dd60:                            80015fec 00000001 08000000 8113b000 08000000

dd80: 00000047 00008000 a806ddbc 80016720 fffffffe 00000000 08000000 00000000

dda0: 00000000 00000000 a82a9b94 80016960 803e6be4 00000001 80bcbea0 00000000

ddc0: 00000047 a82a9b94 08000000 a80c4610 000000d0 803e6be4 80b2fb40 80016c1c

dde0: 00000047 00000000 803e6be4 800b1158 00000000 8030914c a82a9b80 80b75d30

de00: a80c4610 a80c4610 a80c4600 a82a9b90 80b23814 803e6be4 a82a9b90 80110e6c

de20: 00200200 00001ebe a82a9a40 a82a9b40 a806de60 80111058 00000000 a82a9a40

de40: 00000000 a82a9b40 a80c3e00 80111a68 00000000 800b04e0 a82a9a80 a82a9a90

de60: a80c3e00 00000000 a80c4610 80be36a0 a80c4610 00000000 80b75d44 80b81340

de80: 80b23814 80b2fb40 00000000 80307d5c 80307d44 80306adc 00000000 a80c4610

dea0: 80b75d44 a80c4644 00000000 80306cc8 00000000 80b75d44 80306c3c 80304fe0

dec0: a804234c a80c16b0 80b75d44 a829ad80 80b649e0 803062a0 80a86a60 80267fdc

dee0: 80b75d44 80b75d44 00000006 80b81340 80b81340 803072d0 80b3bea8 00000006

df00: 80b81340 80b81340 80b81340 80008744 000000ab 80040508 00000000 a806c010

df20: 80a7f5f8 80ad0d28 00000006 00000006 8003fd74 8003fdcc 00000000 80b3bea8

df40: 00000006 80b81340 80b81340 80afd480 000000ab 80b2fb40 80b2fb34 80afdb68

df60: 00000006 00000006 80afd480 7a5dcff3 ebdbb65f 7567aef9 5f7fb2ef 00000000

df80: 8056e6cc 00000000 00000000 00000000 00000000 00000000 00000000 8056e6d4

dfa0: 00000000 00000000 8056e6cc 8000e118 00000000 00000000 00000000 00000000

dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000001

Code: e52de004 e1a0c002 e1a0e002 e2511040 (a8a0500c)

---[ end trace 993561f6a7d64d56 ]---

Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b

--

Marco

[igorpadykov]

Hi Marco

for Solo one needs to use imx6dl.dtb, since i.MX6Solo

is the same as DL only with one core, refer to p.3 attached document.

Also for new board one needs to run DDR test and update DDR settings

in .cfg file (like mx6q_4x_mt41j128.cfg)

i.MX6 DDR Stress Test Tool V1.0.3

Best regards

igor

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[marcocavallini]

Hi Igor,

your instrunctions are not clear. Are they related to SABREAUTO?

I expected to start cloning a SABLESD.

If I do as you said, the kernel doesn't boot at all and immediately reset the board.

  make imx_v7_defconfig

  make -j4 uImage LOADADDR=0x10008000

  make imx6dl-sabresd.dtb

U-Boot 2015.01 (Feb 27 2015 - 17:44:58)

CPU:   Freescale i.MX6SOLO rev1.1 at 792 MHz

CPU:   Temperature 22 C

Reset cause: POR

Board: MX6-SabreQ - *** Version (0.2.0) ***

I2C:   ready

DRAM:  1 GiB

PMIC:  PFUZE100 ID=0x10

MMC:   0

FSL_SDHC: 0, FSL_SDHC: 1

...

tftp ${loadaddr} uImage

tftp ${fdt_addr} imx6

bootm ${loadaddr} - ${fdt_addr}

...

Bytes transferred = 39589 (9aa5 hex)

## Booting kernel from Legacy Image at 12000000 ...

   Image Name:   Linux-3.10.17+g232293e

   Image Type:   ARM Linux Kernel Image (uncompressed)

   Data Size:    5739888 Bytes = 5.5 MiB

   Load Address: 10008000

   Entry Point:  10008000

   Verifying Checksum ... OK

## Flattened Device Tree blob at 18000000

   Booting using the fdt blob at 0x18000000

   Loading Kernel Image ... OK

   Loading Device Tree to 4f556000, end 4f562aa4 ... OK

Starting kernel ...

(here board reset)

[igorpadykov]

Hi Marco

for new custom board had you run DDR test ?

After that one needs to rebuild Uboot with updated DDR settings

in Uboot .cfg file (like mx6q_4x_mt41j128.cfg)

i.MX6 DDR Stress Test Tool V1.0.3

~igor

[marcocavallini]

Hi Igor,

we did run DDR test.

U-boot 2015 boot perfectly, MMC, fatload, TFTP works.

Linux 3.10.17 derived from iMX6Q-SABRE boots as I showed in my first post above.

There must be something more subtle to define in the DeviceTree perhaps.

Thank you

--

Marco

[igorpadykov]

Hi Marco

one can try Demo images

L3.10.17_1.0.2_iMX6QDLS_BUNDLE : i.MX 6Quad, i.MX 6Dual, i.MX 6DualLite, i.MX 6Solo Linux Binary Demo Files

also one can try ldo configuration: imx6dl-sabresd-ldo, for auto  - imx6dl-sabreauto.

~igor

[marcocavallini]

Hi Igor,

I downloaded fsl-L3.10.17_1.0.2_iMX6QDLS_Bundle.

I have noticed that it use u-boot-2013.04 so I downloaded it and rebuilt from scratch

u-boot imx_v2013.04_3.10.17_1.0.0_ga

and

make mx6solosabresd_config

Configuring for mx6solosabresd - Board: mx6qsabresd, Options:

IMX_CONFIG=board/freescale/mx6qsabresd/mx6solo_4x_mt41j128.cfg,

MX6SOLO,DEFAULT_FDT_FILE="imx6dl-sabresd.dtb",DDR_MB=512,SYS_USE_SPINOR,SYS_NOSMP="nosmp"

Now I booted it

U-Boot 2013.04-04986-g06dd4f7-dirty (Mar 03 2015 - 15:23:22)

CPU:   Freescale i.MX6SOLO rev1.1 at 792 MHz

CPU:   Temperature 43 C, calibration data: 0x5a151069

Reset cause: POR

Board: MX6Q/SDL-SabreSD

I2C:   ready

DRAM:  512 MiB

MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2

Then I load my kernel from MMC1

Booting Linux on physical CPU 0x0

Linux version 3.10.17+g232293e (koan@amonra) (gcc version 4.8.2 (GCC) ) #47 SMP PREEMPT Mon Mar 2 11:43:53 CET 2015

CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c53c7d

CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache

Machine: Freescale i.MX6 Quad/DualLite (Device Tree), model: Freescale i.MX6 Quad SABRE Smart Device Board

cma: CMA: reserved 320 MiB at 1c000000

Memory policy: ECC disabled, Data cache writealloc

PERCPU: Embedded 9 pages/cpu @812f1000 s12992 r8192 d15680 u36864

Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048

Kernel command line: noinitrd console=ttymxc0,115200

PID hash table entries: 2048 (order: 1, 8192 bytes)

Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)

Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)

Memory: 512MB = 512MB total

Memory: 176068k/176068k available, 348220k reserved, 0K highmem

...

usbcore: registered new interface driver ushc

sdhci-pltfm: SDHCI platform and OF driver helper

mmc0: no vqmmc regulator found

mmc0: no vmmc regulator found

mmc0: SDHCI controller on 2198000.usdhc [2198000.usdhc] using ADMA

mmc0: mmc_rescan_try_freq: trying to init card at 400000 Hz

mmc0: host does not support reading read-only switch. assuming write-enable.

mmc0: new high speed SD card at address 59b4

mmcblk0: mmc0:59b4 USD   1.87 GiB

mmcblk0: p1 p2

Galcore version 4.6.9.9754

(here hangs)

What doed the new line "Galcore version 4.6.9.9754" mean?

TIA

[fabio_estevam]

Marco,

The Galcore hang happens because you use imx6dl-sabredsd.dtb instead of imx6dl-sabresd-ldo.dtb.

Regards,

Fabio Estevam

[marcocavallini]

The weird thing is that I noticed that Yocto Project build a solosabre system using the DLsabre Devicetree.

In my case whenever I use the DL the kernel doesn't boot and the system immediately reboot, if I use the Quad it boot as shown above.

[igorpadykov]

Hi Marco

had you configured properly DDR in Uboot, because from your logs:

U-Boot 2015.01 (Feb 27 2015 - 17:44:58)  --> DRAM:  1 GiB

u-boot imx_v2013.04_3.10.17_1.0.0_ga    ---> DRAM:  512 MiB

also please try imx6dl-sabresd-ldo.dtb, as was suggested

It may be recommended to try minimal build (without GPU/VPU support).

Best regards

igor

[marcocavallini]

Hi Igor,

you are right. I noticed that and that's the reason why I moved from u-boot-2015.01 to u-boot-2013.04.

I don't understand why u-boot-2015.01 has this weird behaviour despite the same settings I am using.

However I will focus on the Freescale suggested version u-boot-2013.04.

I ran the DDR test ad you suggested and I found a slightly difference in these registers only (the ones provided by DDR test) but the final result is the same.

DATA 4, 0x021b080c, 0x0047004B // MMDC_MPWLDECTRL0

DATA 4, 0x021b0810, 0x003B003F // MMDC_MPWLDECTRL1

DATA 4, 0x021b083c, 0x423C023C // MPDGCTRL0 PHY0

DATA 4, 0x021b0840, 0x022C022C // MPDGCTRL1 PHY0

DATA 4, 0x021b0848, 0x44464648 // MPRDDLCTL PHY0

DATA 4, 0x021b0850, 0x34362C2E // MPWRDLCTL PHY0

After u-boot-2013.04 rebuild, the result running my kernel 3.10.17 without "MXC Vivante GPU support" is always the same:

...

kjournald starting.  Commit interval 5 seconds

(freezes here)

About the imx6dl-sabresd-ldo.dtb, as I said, using it the kernel immediately reboots.

Is it normal?

Are you sure I need to use DUALLITE kernel system for the SOLO board?

> fatload mmc 1:1 0x18000000 imx6dl-sabresd-ldo.dtb

reading imx6dl-sabresd-ldo.dtb

47956 bytes read in 20 ms (2.3 MiB/s)

> bootm 0x12000000 - 0x18000000

## Booting kernel from Legacy Image at 12000000 ...

   Image Name:   Linux-3.10.17+g232293e

   Image Type:   ARM Linux Kernel Image (uncompressed)

   Data Size:    5659696 Bytes = 5.4 MiB

   Load Address: 10008000

   Entry Point:  10008000

   Verifying Checksum ... OK

## Flattened Device Tree blob at 18000000

   Booting using the fdt blob at 0x18000000

   Loading Kernel Image ... OK

OK

   Using Device Tree in place at 18000000, end 1800eb53

Starting kernel ...

(reboot here)

[igorpadykov]

Hi Marco

refer to attached document

2.1 Boot Loader

i.MX 6Solo SABRE-AI:

• u-boot-imx6solosabreauto.imx (SD/MMC)

• u-boot-imx6solosabreauto_spi-nor.imx (SPI-NOR)

• u-boot-imx6solosabreauto_eim-nor.imx (Parallel NOR)

• u-boot-imx6solosabreauto_nand.imx (NAND)

p.3

i.MX 6DualLite SABRE-AI, i.MX 6Solo SABRE-AI:

• uImage_imx_v7_defconfig

• uImage-imx6dl-sabreauto.dtb

• uImage-imx6dl-sabreauto-ecspi.dtb

• uImage-imx6dl-sabreauto-gpmi-weim.dtb

• uImage-imx6dl-sabreauto-flexcan1.dtb

~igor

[marcocavallini]

Hi Igor,

the HW engineer has a doubt.

In this case I have a board mounting i.MXSOLO and 32bit DDR3 (2x MT41K128M16) and a total of 512MB

Is this design supported by the CPU?

Reference design for i.MX6 and 32bit DDR3

[igorpadykov]

Hi Marco

it is supported, otherwise you would not

run Uboot. Freescale reference designs

are i.MX6DL,i.MX6Q with 64bits DDR3.

However for i.MX6Solo one needs to set 32bit width

in dcd header (DDR initialization). 512MB is too few

for graphic/video - probably you will need to tweak linux

memory settings. It may be interesting to look at attached

document about linux Solo differencies.

Recommended to check that linux does not try

to run ddr at 532MHz (Solo supports up to 400MHz).

~igor

[marcocavallini]

H Igor,

the document you provided contains some interesting patches reference (ENGR*), however looks like they are related to a i.MX6DL starting point.

Unfortunately, as I said I had to use imx6q-sabresd-ldo.dtb (or imx6q-sabresd.dtb) because the imx6dl-sabresd-ldo.dtb reset immediately my board.

Do you have any hint on that?

[igorpadykov]

Hi Marco

what design was used as reference for that board ?

What PMIC ?

Since board is reset, I am not sure that your board is hardware

healthy regarding DDR and power. So I would suggest

to try any linux to check it. Uboot is quite tolerant to DDR errors,

while linux - not. Also uboot does not use power management and

cpu-freq (linux) driver.

~igor

[marcocavallini]

Hi Igor,

this design was created following  your reference design SPF-27516_C3 which uses a i.MX6 Quad.

The PMIC is MMPF0100F0EP.

In the schematic we only removed the circuit parts regarding the second RAM bus leaving the connections for the remaining bus exactly the same as in you design.

TIA

[igorpadykov]

Hi Marco

could you also check if all differencies were implemented

as required by sect.4.1 Connection differences

AN4397 Common Hardware Design for i.MX 6Dual/6Quad and i.MX 6Solo/6DualLite

Best regards

igor

[marcocavallini]

This is our DDR3 configuration. It uses one CS only and in your doc AN4397 is not listed this configuration.

Is it correct?

Thanks

[igorpadykov]

I think it is correct.

Also could you check that capacitors at _CAP nodes, NVCC_PLL_OUT

have values recommended by latest Design Check List

HW Design Checking List for i.MX6DQSDL

regarding last hanging case with uboot 2013 :

Galcore version 4.6.9.9754

(here hangs)

please add maxcpus=1 to kernel command line and check similar issue on link below

kernel hangs or fails to allocate CMA in galcore with i.MX Solo Sabre

~igor

[marcocavallini · Accepted solution]

Hi Igor,

I solved and now I am able to boot a kernel derived from iMX6DLSABRE.

The problem was caused by bad regulators settings like vmmc-supply = <&reg_3p3v> in the DeviceTree.

Thank you very much for your support.

--

Marco