LCDIF vs GPIO interrupt

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LCDIF vs GPIO interrupt

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Contributor V

Hi, All

My design is imx28 + Linux/CE. Recently I find that if LCDIF is not initialized, the gpio interrupts can not work properly. I will continue to trace the problem to figure out what exactly happens to GPIO inteterrupts. I just wonder if anybody met thus a problem before. Thanks!

BR

Cheng Shi

www.emtronix.com

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Contributor V

I found the problem!

The GPIO unit are assumed to use CLK_X which is XTAL = 24MHz, according to reference manual. But my experiment show that lacth of interrupt of GPIO is related with CLK_H instead of CLK_X. Therfore CLK_H's slow mode can not be enabled if the interrupt pulse is very short (about 83ns).

Cheng Shi

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Contributor V

I can not figure out which clock ICOLL use in iMX28. Please let me know if anyone have information about those issue. Thanks!

BR

Cheng Shi

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497 Views
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Contributor V

It is found that calling LCDIFDisplayFrameBuffer(..) is critical to gpio interrupts.

BOOL LCDIFDisplayFrameBuffer(const void* pData)

{

    hw_lcdif_ctrl_t ctrl_reg;

    UINT32 physAddress;

    ctrl_reg.U = HW_LCDIF_CTRL_RD();

    physAddress = (UINT32) pData;

    if (ctrl_reg.B.DOTCLK_MODE || ctrl_reg.B.DVI_MODE) {

        HW_LCDIF_NEXT_BUF_WR(physAddress);

        if (ctrl_reg.B.RUN != 1)

            HW_LCDIF_CUR_BUF_WR(physAddress);

    } else {

        if (ctrl_reg.B.RUN == 1)

            while (HW_LCDIF_CTRL.B.RUN == 1) ;

        HW_LCDIF_CUR_BUF_WR(physAddress);

    } //if/else

    ctrl_reg.B.DATA_SELECT = DATA_MODE;

    ctrl_reg.B.WAIT_FOR_VSYNC_EDGE = ctrl_reg.B.VSYNC_MODE;

    ctrl_reg.B.RUN = 1;

    HW_LCDIF_CTRL_WR(ctrl_reg.U);

    return TRUE;

}

After calling LCDIFDisplayFrameBuffer(), gpio interrupts works fine.  If I just comment all the code in LCDIFDisplayFrameBuffer(), gpio interrupts fail! HW_LCDIF_CTRL register is NOT related with GPIO at all, incredibel!

The behavior of gpio interrupt is like X_CLK is slow down so that interrupt pulse (about 84ns) can not be detected. HW_CLKCTRL_XBUS.DIV is set to 1, therfore the X_CLK should be 24MHz.

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