Kernel is getting hanged while implementing system idle mode.

[vieshothn]

I was trying to implement system idle mode for power management purpose in my custom board which has imx6 processor. The document "i.MX 6Solo Power Consumption Measurement" contains the information about what is system idle mode and the steps to send the processor to system idle board.

When I try to implement the steps mentioned in the document "i.MX 6Solo Power Consumption Measurement" the board is getting hanged always.

By tracing the kernel code I spotted out that the kernel is getting hanged when the kernel was trying to change the frequency of DDR3 to 24MHz (exact line where the kernel is getting hanged is at the function "mx6_change_ddr_freq" in the file "busfreq_ddr3.c").

But when I perform the same steps in sabresd board it is working fine, And the measurement value of individual power domain also same as the the value mentioned in the document for sabresd.

We are not using the same DDR3 as in Sabresd board.

The part number of DDR3 which we use is "NT5CC256M16CP"

And the sabresd board DDR3 part number is "MT41K128M16-125:k"

I used the same kernel image (v3.14.28) for sabresd and for my custom board.

I also tried changing DDR3 frequency to 30MHz instead of 24MHz in system idle mode in my custom board. It works for one time and when we do it again it is getting hanged.

has anyone had experienced similar issue before?

Any pointers here will be very helpful.

The "system_idle.sh" file attached with this mail contains the command to implement the system idle mode.

Original Attachment has been moved to: system_idle.sh

[paullai]

Hi Vieshoth,

     We encountered the same issue on a handheld project using i.MX 6solo. Would you please advise how did you solve it? Thanks in advanced!!

Best Regards,

Paul Lai

[igorpadykov]

Hi Vieshoth

you should not use the same kernel image (v3.14.28) for sabresd and for custom board

if not using the same DDR3 as in Sabresd board. Please run ddr test and update

ddr settings in uboot *.cfg file

i.MX6/7 DDR Stress Test Tool V2.40

Best regards

igor

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[vieshothn]

Hi igor,

Thanks for the reply.

I didn't use the same kernel binary in both boards. what I meant to say is I used the same kernel version for both the boards.

But I configured the kernel with their respective configuration file for each board.

Sorry for not conveying it properly.

Yes I Tried this "DDR stress tool". But the issue is still there.

These are the steps I followed while trying to solve the issue. But it failed.

STEP 1

First updated the "register configuration" sheet in "Mx6DQSDL DDR3 Script Aid V0.10.xlsx" spreadsheet according to my DDR3 datasheet. The updated table is shown below.

This configuration is for imx6 solo. We are using 2 DDR3 (4Gb each) chips.

	Device Information
	Manufacturer:	Micron
	Memory part number:	NT5CC256M16CP
	Memory type:	DDR3-1600	1600
	DRAM density (Gb)	4
	DRAM Bus Width	16
	Number of Banks	8
	Number of ROW Addresses	15
	Number of COLUMN Addresses	10
	Page Size (K)	2
	Self-Refresh Temperature (SRT)	Normal
	tRCD=tRP=CL (ns)	13.75
	tRC Min (ns)	48.75
	tRAS Min (ns)	35
	System Information
	i.Mx Part	i.Mx6S	Rigel
	Bus Width	32
	Density per chip select (Gb)	8
	Number of Chip Selects used	1	If only one CS is used, that must be CS0.
	Total DRAM Density (Gb)	8
	DRAM Clock Freq (MHz)	400
	DRAM Clock Cycle Time (ns)	2.5
	Address Mirror (for CS1)	Disable
	SI Configuration
	DRAM DSE Setting - DQ/DQM (ohm)	48	40ohm is used in FSL reference design.
	DRAM DSE Setting - ADDR/CMD/CTL (ohm)	48	40ohm is used in FSL reference design.
	DRAM DSE Setting - CK (ohm)	48	40ohm is used in FSL reference design.
	DRAM DSE Setting - DQS (ohm)	48	40ohm is used in FSL reference design.
	System ODT Setting (ohm)	60

STEP 2

After the step1 the spreadsheet "Mx6DQSDL DDR3 Script Aid V0.10.xlsx" upated its "RealView.inc" sheet according to the above table.

I ran the "Stress test tool V1.0.2" tool giving "RealView.inc" as input.

STEP 3

This tool did the calibration and produced some fine tuned values for the registers below.

*********************************************

MMDC_MPWLDECTRL0 ch0 after write level cal: 0x00550053

MMDC_MPWLDECTRL1 ch0 after write level cal: 0x0045004B

MMDC registers updated from calibration

Read DQS Gating calibration

MPDGCTRL0 PHY0 (0x021b083c) = 0x024C0248

MPDGCTRL1 PHY0 (0x021b0840) = 0x02300230

Read calibration

MPRDDLCTL PHY0 (0x021b0848) = 0x46484E4A

Write calibration

MPWRDLCTL PHY0 (0x021b0850) = 0x3A362E34

*********************************************

STEP 4

I updated these register with the above values in the uboot.cfg file (I have attached this file with this mail in the same name).

Built the uboot. Booted my custom board. Ran the system_idle.sh script in the kernel. It still getting hanged in the same point.

I also tried building the kernel with the "imx_v7_defconfig" (This is the file we use for configuring the kernel for sabresd) with the minimum required peripheral support. But still the same issue is there.

Can u please give me some suggestions to proceed ahead.

[igorpadykov]

Hi Vieshoth

one can also try to follow attached document sect.5 Enabling Solo Emulation.

Best regards

igor