Issue with using MIPI-CSI 4-Lane on i.MX8MM

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Issue with using MIPI-CSI 4-Lane on i.MX8MM

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namanthaker
Contributor IV

Hello,

I am using a 3rd-party ISP+Sensor combo with i.MX8M Mini and facing an issue when using 4-lane configuration.

When I use 1-lane or 2-lane, I am able to capture from camera successfully. But when I use 4-lanes, I am unable to capture anything. I have measured MIPI signals on all 4-lanes from sensor to IMX8MM and they are fine. 

1-lane DTS configuration:
mipi1_sensor_ep: endpoint@1 {
remote-endpoint = <&camera>;
data-lanes = <1>;
csis-hs-settle = <13>;
csis-clk-settle = <2>;
csis-wclk;
};

2-lane DTS configuration:
mipi1_sensor_ep: endpoint@1 {
remote-endpoint = <&camera>;
data-lanes = <2>;
csis-hs-settle = <13>;
csis-clk-settle = <2>;
csis-wclk;
};

4-lane DTS configuration:
mipi1_sensor_ep: endpoint@1 {
remote-endpoint = <&camera>;
data-lanes = <1 2 3 4>;
csis-hs-settle = <13>;
csis-clk-settle = <2>;
csis-wclk;
};

I also tried to use "data-lanes = <4>", but got same issue.

This issue is reported in another post (link is below). The solution in that post is to use 1-lane only. But that solution is not feasible for me as I need to use higher resolution at later stage. I tried the other suggestions from this post but none of them worked.
https://community.nxp.com/t5/i-MX-Processors/iMX8M-MIPI-CSI-4-lane-configuration/m-p/875755

Q1: Is 4-lane configuration validated on IMX8MM? Any information about the use-case/testing done with 4 lanes will be appreciated.?
Q2: Is there a patch or changes needed to enable 4-lane configuration?
Q3: Any debug pointers to resolve this issue?

Regards,
Naman

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namanthaker
Contributor IV

Hello,

We have managed to get 4-lane working on i.MX8M Mini. We disassembled the entire setup and reworked it again and made a new clean SW build to test. I have attached the patch used to get 4-lane working which is same as the changes suggested in this thread.

Thank you very much for your support with the issue!

Regards,
Naman Thaker

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27 Replies
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joanxie
NXP TechSupport
NXP TechSupport

sorry for my delay, I took my sick leave before, we will take holiday from 5/1-5/5, in order to save your time, I have escalated your issue to the expert team already, any update, I will send to the DFAE, the community is hard to trace, I'm afraid I will miss your update, pls contact them directly

 

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namanthaker
Contributor IV

Hi @joanxie,

Were you able to reproduce the issue with memtool? I am still unable to read MIPI registers using memtool.

Did you get a chance to go through the shared logs and source files? Do you have any findings?

Regards,
Naman

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joanxie
NXP TechSupport
NXP TechSupport

two-8bit-sensor-mode maybe isn't suit for your case, but you can try it maybe, normally, for 4-lane, just enable 4-lane in the dts file, for dump registers, you can find memtool under /unit_tests,  use this tool to dump all of registers based on the register address which is define in the reference manual

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joanxie
NXP TechSupport
NXP TechSupport

I have already sent to the DFAE, you should get the patch soon, this isn't official released version, I couldn't post here, and this patch is just for reference

 

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joanxie
NXP TechSupport
NXP TechSupport

sorry for missing this message, could you tell me what resolution and frame rate do you use? and any improvement about this? 19 should correct according to the table of hssettle settings, do you mind sending me your whole dts file and what's your resolution and frame rate?

 

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namanthaker
Contributor IV

I am using 2592x1944@30Hz i.e. 5MP@30hz resolution and framerate.

There was no improvement by setting hssettle value to 19.

Attached complete DTS for reference.

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joanxie
NXP TechSupport
NXP TechSupport

for 4-lane and 2-lane settings, did you compare their log file? anything different? did you get the correct log file when you set the 4-lane? and your dts file is limited, so you can refer to the patch first then tell me the result

 

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