Issue Loading Program Image in i.MX6 NAND Boot

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Issue Loading Program Image in i.MX6 NAND Boot

Jump to solution
1,895 Views
scottkanowitz
Contributor II

I’m setting up a board using an i.MX6Q to boot from NAND. I have the board booting fine from an SD card using a custom u-boot image packaged with the mkimage utility into an imx boot format (IVT and DCD added to the head).

When I burn this image to NAND using the kobs-ng tool in Linux I can’t get the board to load and execute U-Boot. Using JTAG I’m able to see that the boot ROM gets to the point of loading the IVT, Boot Data and DCD and actually executing the commands in the DCD (all the MMDC values are programmed and the IVT and DCD are present in DRAM). However, the actual program binary for U-Boot is not loaded.

I’m assuming since I got to the point of loading and executing the DCD that the FCB and DBBT are good and the NAND boot is functional. Additionally, I verified that the ROM is not reading garbage data out of NAND because I can modify the values at the program destination address and they remain unchanged following a reset.

What am I missing that is preventing the final step of loading and executing the image? If the SD card boot process succeeds with the u-boot image why wouldn’t the NAND boot process?

Labels (2)
1 Solution
919 Views
scottkanowitz
Contributor II

I figured out the problem here. It turns out that the base sabrelite configuration included with the u-boot 2013.10 distribution contains a DCD entry that turns off the GPMI NAND clocks.

The configuration for generating the IMX compatible image uses the included clocks.cfg file (in boards/freescale/sabrelite). One of the entries in this file is

DATA 4, CCM_CCGR4, 0x00FFF300

When this line is executed by the boot ROM from the DCD it ends up turning off the following clocks.

-rawnand_u_gpmi_input_apb clock

-rawnand_u_gpmi_bch_input_gpmi_io

-rawnand_u_gpmi_bch_input_bch

-rawnand_u_bch_input_apb

This effectively disables any additional loading from NAND. Changing the clocks.cfg entry to

DATA 4, CCM_CCGR4, 0xFFFFF300

fixes the problem.

View solution in original post

0 Kudos
Reply
1 Reply
920 Views
scottkanowitz
Contributor II

I figured out the problem here. It turns out that the base sabrelite configuration included with the u-boot 2013.10 distribution contains a DCD entry that turns off the GPMI NAND clocks.

The configuration for generating the IMX compatible image uses the included clocks.cfg file (in boards/freescale/sabrelite). One of the entries in this file is

DATA 4, CCM_CCGR4, 0x00FFF300

When this line is executed by the boot ROM from the DCD it ends up turning off the following clocks.

-rawnand_u_gpmi_input_apb clock

-rawnand_u_gpmi_bch_input_gpmi_io

-rawnand_u_gpmi_bch_input_bch

-rawnand_u_bch_input_apb

This effectively disables any additional loading from NAND. Changing the clocks.cfg entry to

DATA 4, CCM_CCGR4, 0xFFFFF300

fixes the problem.

0 Kudos
Reply