Is i.MX6SL damaged if power-down sequence is not observed without MMPF0100.

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Is i.MX6SL damaged if power-down sequence is not observed without MMPF0100.

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satoshishimoda
Senior Contributor I

Hi community,

I confirmed i.MX6SL is not damaged by any power-down sequence when MMPF0100 is used in https://community.freescale.com/thread/346526.

Then, I want to confirm whether i.MX6SL is damaged when MMPF0100 is NOT used if the power-down is not observed.

Would you let me know it?

Best Regards,

Satoshi Shimoda

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Shimoda-San,

Unfortunately the i.MX6SL does require a certain power-down sequence. If you look at the power down sequence order you will see that the voltages start to be turned off from the smaller voltage to the largest voltage with the exception of VDD_SNVS_IN.

When the MMPF0100 is used, the voltages will be power off in this order (smaller voltage to largest voltage) because of the way the PMIC generates the voltages.

You would need to review your power design to ensure that this condition is met in.

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gusarambula
NXP TechSupport
NXP TechSupport

Hello Shimoda-San,

Unfortunately the i.MX6SL does require a certain power-down sequence. If you look at the power down sequence order you will see that the voltages start to be turned off from the smaller voltage to the largest voltage with the exception of VDD_SNVS_IN.

When the MMPF0100 is used, the voltages will be power off in this order (smaller voltage to largest voltage) because of the way the PMIC generates the voltages.

You would need to review your power design to ensure that this condition is met in.

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