Interruption frequency of SDMA & SSI in i.MX6DQ.

[keitanagashima]

Dear All,

Hello. I have questions about Interruption frequency of SDMA & SSI.

Please check and answer for attached file.

Best Regards,

Keita

[Yuri]

Hello,

Basically Your understanding is correct ; but usually interrupts of

CPU are caused after total operation is completed. Each burst of data

transfer is not needed to be served. Generally it is required to setup
source, destination addresses and number of bytes to transfer.

   Transfer consists of several bursts, depending on FIFO size. When

transfer completed, CPU interrupt is asserted. Please refer to bit I (19)

of Bufffer descriptor in Table 55-49 (Buffer Descriptor Field Descriptions)

of the i.MX6 D/Q RM : “When SDMA has finished to process data transfer
attached to this buffer descriptor, send an interrupt to the ARM platform.”

Have a great day,
Yuri

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[keitanagashima]

Hi Yuri,

Thank you for your information!

> Generally it is required to setup

> source, destination addresses and number of bytes to transfer.

We found the count setting of Buffer descriptor was 768 Bytes in jb4.2.2_1.1.0.

So, in case of "Fs = 44.1kHz & Transfer bit = 16bit x 2ch = 32bit";

(768Byte/4Byte) * (1/44.1kHz) = 4.35ms

And, I measured the Interruption frequency was 4.35ms on custom board, too.

Next, in case of "Fs = 96kHz & Transfer bit = 24bit x 2ch = 48bit"

(768Byte/6Byte) * (1/96kHz) = 1.33ms

The interruption frequency was very high!

[Questions]

[Q1]

Is my above calculating equation right?

[Q2]

Could you tell me the way to increase the count of BufferDescriptor to decrease the interruption frequency?

And, is there an bad effect by increasing the count?

[Note]

"Setting point of SDMA BD(BufferDescriptor)"

- Source code : drivers\dma\imx-sdma.c

- Function : static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic

"How to measure the "

Insert the "printk" in below code.

- Source code : drivers\dma\imx-sdma.c

- Function :sdma_handle_channel_loop

Best Regards,

Keita

[Yuri]

Hi,

1.
   Yes - Your approach is correct.

2.

  Table A-1 (SDMA Scripts Overview) of i.MX6 D/Q RM states

about SSI mcu_2_ssiapp script, where thre is counter parameter from

"Parameters Through Buffer Descriptor" column. This is the number
of bytes to transmit. You may try to play with it.

Regards,

Yuri.

[keitanagashima]

Hi Yuri,

Thank you for your reply.

> 2.

>  Table A-1 (SDMA Scripts Overview) of i.MX6 D/Q RM states

> about SSI mcu_2_ssiapp script, where thre is counter parameter from

> "Parameters Through Buffer Descriptor" column. This is the number

> of bytes to transmit. You may try to play with it.

Sorry for my poor understanding.

Could you tell me the detail steps to change the counter parameter?

3.

Is there an bad effect by increasing the count parameter?

Best Regards,

Keita

[Yuri]

Hello,

what is BSP release ?

Regards,

Yuri.

[keitanagashima]

Hi Yuri,

Sorry.

My customer is using jb4.2.2_1.1.0.

Best Regards,

Keita

[Yuri]

Hello,

really, number of bytes to transfer is provided by an application.

Regards,

Yuri.

[keitanagashima]

Hi Yuri,

> really, number of bytes to transfer is provided by an application.

No.

My question was below.

Could you tell me how to set (change) the counter parameter to decrease the interruption frequency?

Best Regards,

Keita

[Yuri]

Keita, hi !

Android jb4.2.2 is based on Linux 3.0.35 kernel.

Kernel driver setups burst length ; buffer addresses and total length

to transfer is provided by an application.

Regards,

Yuri.

[keitanagashima]

Dear Yuri,

Hello.

I understood that to increase Buffer descriptor (Current 768 Bytes), it is necessary to set from Application.

Do you have an sample application to test setting the counter parameter?

(It is OK the sample app on Linux. ex. Unit test or gstreamer...)

Best Regards,

Keita

[Yuri · Accepted solution]

In aplay

https://fossies.org/dox/alsa-utils-1.1.0/aplay_8c_source.html

parameter "--buffer-size", finally defining the counter,

may be setup from command line.

~Yuri.