IMX95 failed to reparent can1

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IMX95 failed to reparent can1

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292件の閲覧回数
HenryHsu
Contributor I

I tried to enable can1

my device tree pin is follow imx95 evk, and disable  &micfil

IMX95_PAD_PDM_CLK__AONMIX_TOP_CAN1_TX  0x39e

IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_CAN1_RX  0x39e

, but the following error occurred. 

[ 9.968941] CAN device driver interface
[ 9.976800] scmi-pinctrl-imx scmi_dev.8: Error set config -13
[ 9.976814] scmi-pinctrl-imx scmi_dev.8: pin_config_set op failed for pin 121
[ 9.976893] clk: failed to reparent can1 to syspll1_pfd1_di: -1
[ 9.978973] Internal error: synchronous external abort: 0000000096000010 [#1] SMP
[ 9.978986] Modules linked in: flexcan(+) can_dev neoisp(+) at24 rpmsg_ctrl rpmsg_char pwm_fan enetc4_uio(O) fsl_ecat_enetc4 fsl_ecat_enetc_core moal(O) mlan(O) fuse
[ 9.979017] CPU: 5 UID: 0 PID: 357 Comm: (udev-worker) Tainted: G M O 6.18.2-rt3-1.0.0-1.0.0 #1 PREEMPT_RT
[ 9.979026] Tainted: [M]=MACHINE_CHECK, [O]=OOT_MODULE
[ 9.979028] Hardware name: Axiomtek i.MX95 scm136 board (DT)
[ 9.979031] pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
[ 9.979035] pc : flexcan_read_le+0x0/0x20 [flexcan]
[ 9.979060] lr : flexcan_probe+0x454/0x834 [flexcan]
[ 9.979067] sp : ffff800086133820
[ 9.979069] x29: ffff800086133850 x28: ffff8000862b0000 x27: ffff000085a182a0

Does anyone know how to fix this?

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263件の閲覧回数
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @HenryHsu 

Here is my previous test on i.MX95 EVK, please check your dts with below modifications.
 
dts modification:
 
 
Zhiming_Liu_2-1785995739657.pngZhiming_Liu_2-1785995739657.png

 

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index ab7bd4fdaadf..5eb3011f0894 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -380,7 +380,7 @@ &flexcan1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_flexcan1>;
 	xceiver-supply = <&reg_can1_stby>;
-	status = "disabled";
+	status = "okay";
 };
 
 &flexcan2 {
@@ -623,23 +623,23 @@ spidev0: spi@0 {
 	};
 };
 
-&micfil {
-	#sound-dai-cells = <0>;
-	pinctrl-names = "default", "sleep";
-	pinctrl-0 = <&pinctrl_pdm>;
-	pinctrl-1 = <&pinctrl_pdm_sleep>;
-	assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
-			  <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
-			  <&scmi_clk IMX95_CLK_AUDIOPLL1>,
-			  <&scmi_clk IMX95_CLK_AUDIOPLL2>,
-			  <&scmi_clk IMX95_CLK_PDM>;
-	assigned-clock-parents = <0>, <0>, <0>, <0>,
-				 <&scmi_clk IMX95_CLK_AUDIOPLL1>;
-	assigned-clock-rates = <3932160000>,
-			       <3612672000>, <393216000>,
-			       <361267200>, <49152000>;
-	status = "okay";
-};
+// &micfil {
+// 	#sound-dai-cells = <0>;
+// 	pinctrl-names = "default", "sleep";
+// 	pinctrl-0 = <&pinctrl_pdm>;
+// 	pinctrl-1 = <&pinctrl_pdm_sleep>;
+// 	assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
+// 			  <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
+// 			  <&scmi_clk IMX95_CLK_AUDIOPLL1>,
+// 			  <&scmi_clk IMX95_CLK_AUDIOPLL2>,
+// 			  <&scmi_clk IMX95_CLK_PDM>;
+// 	assigned-clock-parents = <0>, <0>, <0>, <0>,
+// 				 <&scmi_clk IMX95_CLK_AUDIOPLL1>;
+// 	assigned-clock-rates = <3932160000>,
+// 			       <3612672000>, <393216000>,
+// 			       <361267200>, <49152000>;
+// 	status = "okay";
+// };
 
 &mu7 {
 	status = "okay";
@@ -960,19 +960,19 @@ IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B		0x4000031e
 		>;
 	};
 
-	pinctrl_pdm: pdmgrp {
-		fsl,pins = <
-			IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e
-			IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_PDM_BIT_STREAM_BIT0	0x31e
-		>;
-	};
+	// pinctrl_pdm: pdmgrp {
+	// 	fsl,pins = <
+	// 		IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e
+	// 		IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_PDM_BIT_STREAM_BIT0	0x31e
+	// 	>;
+	// };
 
-	pinctrl_pdm_sleep: pdmsleepgrp {
-		fsl,pins = <
-			IMX95_PAD_PDM_CLK__AONMIX_TOP_GPIO1_IO_BIT8			0x51e
-			IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_GPIO1_IO_BIT9		0x51e
-		>;
-	};
+	// pinctrl_pdm_sleep: pdmsleepgrp {
+	// 	fsl,pins = <
+	// 		IMX95_PAD_PDM_CLK__AONMIX_TOP_GPIO1_IO_BIT8			0x51e
+	// 		IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_GPIO1_IO_BIT9		0x51e
+	// 	>;
+	// };
 
 	pinctrl_ptn5110: ptn5110grp {
 		fsl,pins = <
 
 
system manager modification:
diff --git a/configs/mx95evk.cfg b/configs/mx95evk.cfg
index 9250d02..6722097 100755
--- a/configs/mx95evk.cfg
+++ b/configs/mx95evk.cfg
@@ -389,7 +389,7 @@ SYS                       ALL
 # Resources
 
 M7P                 OWNER  # CPUs must be first
-CAN_FD1             OWNER
+// CAN_FD1             OWNER
 FSB                 READONLY
 IRQSTEER_M7         OWNER
 LPIT1               OWNER
@@ -612,6 +612,7 @@ CAMERA5             OWNER
 CAMERA6             OWNER
 CAMERA7             OWNER
 CAMERA8             OWNER
+CAN_FD1             OWNER
 CAN_FD2             OWNER
 CAN_FD3             OWNER
 CAN_FD4             OWNER
 
Result:
Zhiming_Liu_3-1785995783165.pngZhiming_Liu_3-1785995783165.png

 

 

 

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264件の閲覧回数
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @HenryHsu 

Here is my previous test on i.MX95 EVK, please check your dts with below modifications.
 
dts modification:
 
 
Zhiming_Liu_2-1785995739657.pngZhiming_Liu_2-1785995739657.png

 

diff --git a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
index ab7bd4fdaadf..5eb3011f0894 100644
--- a/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx95-19x19-evk.dts
@@ -380,7 +380,7 @@ &flexcan1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_flexcan1>;
 	xceiver-supply = <&reg_can1_stby>;
-	status = "disabled";
+	status = "okay";
 };
 
 &flexcan2 {
@@ -623,23 +623,23 @@ spidev0: spi@0 {
 	};
 };
 
-&micfil {
-	#sound-dai-cells = <0>;
-	pinctrl-names = "default", "sleep";
-	pinctrl-0 = <&pinctrl_pdm>;
-	pinctrl-1 = <&pinctrl_pdm_sleep>;
-	assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
-			  <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
-			  <&scmi_clk IMX95_CLK_AUDIOPLL1>,
-			  <&scmi_clk IMX95_CLK_AUDIOPLL2>,
-			  <&scmi_clk IMX95_CLK_PDM>;
-	assigned-clock-parents = <0>, <0>, <0>, <0>,
-				 <&scmi_clk IMX95_CLK_AUDIOPLL1>;
-	assigned-clock-rates = <3932160000>,
-			       <3612672000>, <393216000>,
-			       <361267200>, <49152000>;
-	status = "okay";
-};
+// &micfil {
+// 	#sound-dai-cells = <0>;
+// 	pinctrl-names = "default", "sleep";
+// 	pinctrl-0 = <&pinctrl_pdm>;
+// 	pinctrl-1 = <&pinctrl_pdm_sleep>;
+// 	assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>,
+// 			  <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>,
+// 			  <&scmi_clk IMX95_CLK_AUDIOPLL1>,
+// 			  <&scmi_clk IMX95_CLK_AUDIOPLL2>,
+// 			  <&scmi_clk IMX95_CLK_PDM>;
+// 	assigned-clock-parents = <0>, <0>, <0>, <0>,
+// 				 <&scmi_clk IMX95_CLK_AUDIOPLL1>;
+// 	assigned-clock-rates = <3932160000>,
+// 			       <3612672000>, <393216000>,
+// 			       <361267200>, <49152000>;
+// 	status = "okay";
+// };
 
 &mu7 {
 	status = "okay";
@@ -960,19 +960,19 @@ IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B		0x4000031e
 		>;
 	};
 
-	pinctrl_pdm: pdmgrp {
-		fsl,pins = <
-			IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e
-			IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_PDM_BIT_STREAM_BIT0	0x31e
-		>;
-	};
+	// pinctrl_pdm: pdmgrp {
+	// 	fsl,pins = <
+	// 		IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK				0x31e
+	// 		IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_PDM_BIT_STREAM_BIT0	0x31e
+	// 	>;
+	// };
 
-	pinctrl_pdm_sleep: pdmsleepgrp {
-		fsl,pins = <
-			IMX95_PAD_PDM_CLK__AONMIX_TOP_GPIO1_IO_BIT8			0x51e
-			IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_GPIO1_IO_BIT9		0x51e
-		>;
-	};
+	// pinctrl_pdm_sleep: pdmsleepgrp {
+	// 	fsl,pins = <
+	// 		IMX95_PAD_PDM_CLK__AONMIX_TOP_GPIO1_IO_BIT8			0x51e
+	// 		IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_GPIO1_IO_BIT9		0x51e
+	// 	>;
+	// };
 
 	pinctrl_ptn5110: ptn5110grp {
 		fsl,pins = <
 
 
system manager modification:
diff --git a/configs/mx95evk.cfg b/configs/mx95evk.cfg
index 9250d02..6722097 100755
--- a/configs/mx95evk.cfg
+++ b/configs/mx95evk.cfg
@@ -389,7 +389,7 @@ SYS                       ALL
 # Resources
 
 M7P                 OWNER  # CPUs must be first
-CAN_FD1             OWNER
+// CAN_FD1             OWNER
 FSB                 READONLY
 IRQSTEER_M7         OWNER
 LPIT1               OWNER
@@ -612,6 +612,7 @@ CAMERA5             OWNER
 CAMERA6             OWNER
 CAMERA7             OWNER
 CAMERA8             OWNER
+CAN_FD1             OWNER
 CAN_FD2             OWNER
 CAN_FD3             OWNER
 CAN_FD4             OWNER
 
Result:
Zhiming_Liu_3-1785995783165.pngZhiming_Liu_3-1785995783165.png

 

 

 

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HenryHsu
Contributor I

Hi,Zhiming_Liu

Thank you for the reply.

you are right ,I need to change system manager config.

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