IMX93-A55 and M33 started at the same time M core cannot control the GPIO

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

IMX93-A55 and M33 started at the same time M core cannot control the GPIO

Jump to solution
3,184 Views
ChumingYang
Contributor III

A core SDK version :6.1.55

M core SDK version:2.14

The first test:using flash.bin(make by make SOC=iMX9 flash_singleboot_m33) to start both A and M cores,then M core cannot control the GPIO(Test using M-core GPIO routine),However, other peripherals such as the SPI IIC work properly

The secord:using flash.bin(make by make SOC=iMX9 flash_singleboot) to start A cores,start M kernel using elf link file,then The M core can control GPIO normally

The third:In the uboot phase, load the firmware for gpio control (.bin format) to m33 and run m33 to control gpio normally

The above test methods are based on IMX93-EVK test,Do you have the general idea and solution of the positioning problem? Thank you

#IMX9352

0 Kudos
Reply
1 Solution
3,119 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @ChumingYang 

 

You are correct.

Zhiming_Liu_0-1713766853157.png

If yes, what can be judged by ATF module initialization success

-->You can try to read GPIO_BASE + 0x10/0x14/0x18/0x1c status.

View solution in original post

0 Kudos
Reply
4 Replies
3,124 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

The first test:using flash.bin(make by make SOC=iMX9 flash_singleboot_m33) to start both A and M cores,then M core cannot control the GPIO(Test using M-core GPIO routine),However, other peripherals such as the SPI IIC work properly

--> The difference between test1 and test2&3 is that, test1 will load M33 firmware before loading A55 firmware. Please check your M-core GPIO routine rules, the current M-core GPIO routine you use may need load A55 firmware before M33 core.

0 Kudos
Reply
3,121 Views
ChumingYang
Contributor III

I've confirmed your point by adding a 5 second delay to the M-core GPIO routine(before RGPIO_PININIT)

By reading the RM, I suspect that GPIO control in the M core is required after the initialization of the ATF security module in the A core is complete,Is this correct? If yes, what can be judged by ATF module initialization success

 

0 Kudos
Reply
3,120 Views
Zhiming_Liu
NXP TechSupport
NXP TechSupport

Hi @ChumingYang 

 

You are correct.

Zhiming_Liu_0-1713766853157.png

If yes, what can be judged by ATF module initialization success

-->You can try to read GPIO_BASE + 0x10/0x14/0x18/0x1c status.

0 Kudos
Reply
3,113 Views
ChumingYang
Contributor III

Thank you very much. I will continue to test in this direction. In addition, I am also very interested in the following questions

https://community.nxp.com/t5/i-MX-Processors/How-to-extend-the-buffer-size-of-A55-in-iMX9352-when-us... 

 

0 Kudos
Reply
%3CLINGO-SUB%20id%3D%22lingo-sub-1850298%22%20slang%3D%22ja-JP%22%20mode%3D%22CREATE%22%3EIMX93-A55%20and%20M33%20started%20at%20the%20same%20time%20M%20core%20cannot%20control%20the%20GPIO%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1850298%22%20slang%3D%22ja-JP%22%20mode%3D%22CREATE%22%3E%3CP%3EA%20core%20SDK%20version%20%EF%BC%9A6.1.55%3C%2FP%3E%3CP%3EM%20core%20SDK%20version%EF%BC%9A2.14%3C%2FP%3E%3CP%3EThe%20first%20test%EF%BC%9Ausing%20flash.bin%EF%BC%88make%20by%20%3CSPAN%3Emake%20SOC%3DiMX9%20flash_singleboot_m33%3C%2FSPAN%3E%EF%BC%89%20to%20start%20both%20A%20and%20M%20cores%EF%BC%8Cthen%26nbsp%3BM%20core%20cannot%20control%20the%20GPIO%EF%BC%88Test%20using%20M-core%20GPIO%20routine%EF%BC%89%EF%BC%8CHowever%2C%20other%20peripherals%20such%20as%20the%20SPI%20IIC%20work%20properly%3C%2FP%3E%3CP%3EThe%20secord%EF%BC%9Ausing%20flash.bin%EF%BC%88make%20by%26nbsp%3B%3CSPAN%3Emake%20SOC%3DiMX9%20flash_singleboot%3C%2FSPAN%3E%EF%BC%89%20to%20start%20A%20cores%EF%BC%8Cstart%20M%20kernel%20using%20elf%20link%20file%EF%BC%8Cthen%20The%20M%20core%20can%20control%20GPIO%20normally%3C%2FP%3E%3CP%3EThe%20third%EF%BC%9AIn%20the%20uboot%20phase%2C%20load%20the%20firmware%20for%20gpio%20control%20(.bin%20format)%20to%20m33%20and%20run%20m33%20to%20control%20gpio%20normally%3C%2FP%3E%3CP%3EThe%20above%20test%20methods%20are%20based%20on%20IMX93-EVK%20test%EF%BC%8CDo%20you%20have%20the%20general%20idea%20and%20solution%20of%20the%20positioning%20problem%3F%20Thank%20you%3C%2FP%3E%3CP%3E%23IMX9352%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-1851368%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ERe%3A%20IMX93-A55%20and%20M33%20started%20at%20the%20same%20time%20M%20core%20cannot%20control%20the%20GPIO%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1851368%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EThank%20you%20very%20much.%20I%20will%20continue%20to%20test%20in%20this%20direction.%20In%20addition%2C%20I%20am%20also%20very%20interested%20in%20the%20following%20questions%3C%2FP%3E%3CP%3E%3CA%20href%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fi-MX-Processors%2FHow-to-extend-the-buffer-size-of-A55-in-iMX9352-when-using%2Fm-p%2F1764431%2Femcs_t%2FS2h8ZW1haWx8dG9waWNfc3Vic2NyaXB0aW9ufExQSFBUTEFUVTRDVlZ8MTc2NDQzMXxTVUJTQ1JJUFRJT05TfGhL%22%20target%3D%22_self%22%3Ehttps%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fi-MX-Processors%2FHow-to-extend-the-buffer-size-of-A55-in-iMX9352-when-using%2Fm-p%2F1764431%2Femcs_t%2FS2h8ZW1haWx8dG9waWNfc3Vic2NyaXB0aW9ufExQSFBUTEFUVTRDVlZ8MTc2NDQzMXxTVUJTQ1JJUFRJT05TfGhL%3C%2FA%3E%26nbsp%3B%3C%2FP%3E%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E