IMX8QXP MIPI CSI voltage level

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IMX8QXP MIPI CSI voltage level

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YK7
Contributor I

Hi

I would like to connect the MIPI-CSI 4-lanes interfaces of iMX8 QXP to a CSI-2 bridge (i.e. lattice LIF-MD6000) to receive parallel raw pixels data from sensor. However, I am quite confuse as the IO supplies for its MIPI PHY and GPIO are 1V on VDD_MIPI_1P0 pins and 1.8V on VDD_MIPI_1P8 pins. Based on MIPI CSI-2 standards, 1.2V is the typical/common D-PHY voltage supply to work with.

Would the intended electrical connections be an issue? What can be the workaround solution?

Thanks.

Rdgs,
YK

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3 Replies

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi YK

 

if bridge complies with MIPI CSI2 Specification V1.3, MIPI D-PHY specification V1.2

it can be connected with i.MX8M Mini.

Regarding : " IO supplies for its MIPI PHY and GPIO are 1V on VDD_MIPI_1P0 pins and 1.8V on VDD_MIPI_1P8 pins" - this rule is applicable to GPIO signals, their levels are defined by pad

power supply value.

 

Best regards
igor

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360 Views
YK7
Contributor I

Hi Igor,

I am using I.MX8 QXP.

What MIPI specs or standards can its MIPI CSI interfaces be connected with?

You had mentioned the IO supplies of the 2 MIPI power rails are meant for GPIO signals. Can I say that when mux pin use as MIPI CSI2, those differential MIPI data and clock signals would match the external D-PHY operating at 1.2V?

 

Rdgs, YK

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349 Views
igorpadykov
NXP TechSupport
NXP TechSupport

>What MIPI specs or standards can its MIPI CSI interfaces be connected with?

 

MIPI CSI2 Specification V1.3, MIPI D-PHY specification V1.2)

 

>You had mentioned the IO supplies of the 2 MIPI power rails are meant for GPIO signals.

 

sorry I did not answer that.

 

>Can I say that when mux pin use as MIPI CSI2, those differential MIPI data and clock signals would match >the external D-PHY operating at 1.2V?

 

they match values defined in MIPI CSI2 Specification V1.3, MIPI D-PHY specification V1.2)

 

Best regards
igor

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