IMX8MP EVK/How to output MIPI 12bit input to DRAM

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IMX8MP EVK/How to output MIPI 12bit input to DRAM

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tetsuro-okuyama
Contributor V

Hi all,


I want to get the output of the sensor connected to MIPI ch-0 of the i.MX8MPlus EVK board.
MIPI format is as follows

 

  • MIPI
    1. format RAW12
    2. width 666[pixel]
    3. height 741[line]

And I use following v4l2 command.

v4l2-ctl --device /dev/video0 --stream-mmap --stream-to=sample.raw --stream-count=1

The sensor output is random pattern on the entire screen (666x741 [pixel]).
So random value should be stored to every pixel, but the value is 0 after x = 250. (See sample.png)
Please let me know if there are any missing settings.

The register settings that are considered necessary for MEDIABLK and ISI are described below.

 

  • CSI GASKET reg settings
                                   initial            configured
    • 0x32EC0060 0x00000000 0x00002C01
      • [13:8] data type RAW12 0x2C
      • [0] gasket output enable 0x1
    • 0x32EC0064 0x00000000 0x0000029A
      • [31:0] Gasket 0 video Horizontal size(count in pixel) 0x29A(666)
    • 0x32EC0068 0x00000000 0x000002E5
      • [31:0] Gasket 0 video Vertical size(count in line) 0x2E5(741)
  • ISI settings
                                   initial            configured
    • 0x32E00000 0x00000000 0xE0000000
      • [31] Enable channel processing 0x1
      • [30] Channel clock enable 0x1
      • [29] Channel bypass enable 0x1
    • 0x32E00004 0x00000000 0x0E000001
      • [29:24] Output image format RAW12 0xE
      • [0] Color Space Conversion bypass control bypass 0x1
    • 0x32E00008 0x00000000 0x00070707
      • [19:16] This field provides the threshold after which the Potential Overflow Panic Alert Interrupt 0x7
      • [11:8] Overflow panic set threshold value for U output buffer 0x7
      • [3:0] Overflow panic set threshold value for Y/RGB output buffer 0x7
    • 0x32E0000C : 0x04380780 0x02E5029A
      • [28:16] Input image height (lines) 0x2E5(741)
      • [12:0] Input image width (pixels) 0x29A(666)
    • 0x32E00010 : 0x00000000 0x3CFC0000
      • [29] Frame received interrupt enable bit 0x1
      • [28] AXI bus read error interrupt enable bit for V data buffer 0x1
      • [27] AXI bus read error interrupt enable bit for U data buffer 0x1
      • [26] AXI bus read error interrupt enable bit for Y/RGB data buffer 0x1
      • [23] V output buffer potential overflow panic interrupt enable bit 0x1
      • [22] V output buffer overflow interrupt enable bit 0x1
      • [21] U output buffer potential overflow panic interrupt enable bit 0x1
      • [20] U output buffer overflow interrupt enable bit 0x1
      • [19] Y output buffer potential overflow panic interrupt enable bit 0x1
      • [18] Y output buffer overflow interrupt enable bit 0x1
    • 0x32E00014 : 0x00000000 0x00000100
      • [8] Current frame being stored in Buffer 1 Address 0x1
    • 0x32E00070 : 0x00000000 0xD4600000
      • [31:0] Starting address for the RGB or Y (luma) memory location 0xD4600000
    • 0x32E0007C : 0x00000000 0x00000534
      • [15:0] Output Buffer Line Pitch 0x534(666*2[byte]=1332)
    • 0x32E0008C : 0x00000000 0xD4200000
      • [31:0] Starting address for the RGB or Y (luma) memory location 0xD4200000
    • 0x32E00098 : 0x04380780 0x02E5029A
      • [28:16] Scaled image height (lines) 0x2E5(741)
      • [12:0] Scaled image width (pixels) 0x29A(666)

Best regards,

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joanxie
NXP TechSupport
NXP TechSupport

I checked the bsp source code, current bsp doesn't support raw 12

"https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/staging/media/imx/imx8-isi-cap.c?h...

so try to add raw format in the driver

struct mxc_isi_fmt mxc_isi_out_formats[] = {
.memplanes = 1,
.colplanes = 1,
.mbus_code = MEDIA_BUS_FMT_RGB888_1X24,
+ }, {
+ .name = "RAW12",
+ .fourcc = V4L2_PIX_FMT_SBGGR12,
+ .depth = { 16 },
+ .color = MXC_ISI_OUT_FMT_RAW16,
+ .memplanes = 1,
+ .colplanes = 1,
+ .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
}
};

 

struct mxc_isi_fmt mxc_isi_src_formats[] = {
.depth = { 32 },
.memplanes = 1,
.colplanes = 1,
+ }, {
+ .name = "RAW12",
+ .fourcc = V4L2_PIX_FMT_SBGGR12,
+ .depth = { 12 },
+ .memplanes = 1,
+ .colplanes = 1,
}
};

 

struct mxc_isi_fmt *mxc_isi_get_src_fmt(struct v4l2_subdev_format *sd_fmt)
sd_fmt->format.code == MEDIA_BUS_FMT_YVYU8_2X8 ||
sd_fmt->format.code == MEDIA_BUS_FMT_AYUV8_1X32 ||
sd_fmt->format.code == MEDIA_BUS_FMT_UYVY8_2X8 ||
- sd_fmt->format.code == MEDIA_BUS_FMT_YUYV8_2X8)
- index = 1;
- else
- index = 0;
+ sd_fmt->format.code == MEDIA_BUS_FMT_YUYV8_2X8) {
+ index = 1;
+ } else if (sd_fmt->format.code == MEDIA_BUS_FMT_ARGB8888_1X32 ||
+ sd_fmt->format.code == MEDIA_BUS_FMT_RGB888_1X24 ||
+ sd_fmt->format.code == MEDIA_BUS_FMT_BGR888_1X24 ||
+ sd_fmt->format.code == MEDIA_BUS_FMT_RGB565_1X16) {
+ index = 0;
+ } else {
+ index = 2;
+ }
return &mxc_isi_src_formats[index];
}

 

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1,549 Views
joanxie
NXP TechSupport
NXP TechSupport

I checked the bsp source code, current bsp doesn't support raw 12

"https://source.codeaurora.org/external/imx/linux-imx/tree/drivers/staging/media/imx/imx8-isi-cap.c?h...

so try to add raw format in the driver

struct mxc_isi_fmt mxc_isi_out_formats[] = {
.memplanes = 1,
.colplanes = 1,
.mbus_code = MEDIA_BUS_FMT_RGB888_1X24,
+ }, {
+ .name = "RAW12",
+ .fourcc = V4L2_PIX_FMT_SBGGR12,
+ .depth = { 16 },
+ .color = MXC_ISI_OUT_FMT_RAW16,
+ .memplanes = 1,
+ .colplanes = 1,
+ .mbus_code = MEDIA_BUS_FMT_SBGGR12_1X12,
}
};

 

struct mxc_isi_fmt mxc_isi_src_formats[] = {
.depth = { 32 },
.memplanes = 1,
.colplanes = 1,
+ }, {
+ .name = "RAW12",
+ .fourcc = V4L2_PIX_FMT_SBGGR12,
+ .depth = { 12 },
+ .memplanes = 1,
+ .colplanes = 1,
}
};

 

struct mxc_isi_fmt *mxc_isi_get_src_fmt(struct v4l2_subdev_format *sd_fmt)
sd_fmt->format.code == MEDIA_BUS_FMT_YVYU8_2X8 ||
sd_fmt->format.code == MEDIA_BUS_FMT_AYUV8_1X32 ||
sd_fmt->format.code == MEDIA_BUS_FMT_UYVY8_2X8 ||
- sd_fmt->format.code == MEDIA_BUS_FMT_YUYV8_2X8)
- index = 1;
- else
- index = 0;
+ sd_fmt->format.code == MEDIA_BUS_FMT_YUYV8_2X8) {
+ index = 1;
+ } else if (sd_fmt->format.code == MEDIA_BUS_FMT_ARGB8888_1X32 ||
+ sd_fmt->format.code == MEDIA_BUS_FMT_RGB888_1X24 ||
+ sd_fmt->format.code == MEDIA_BUS_FMT_BGR888_1X24 ||
+ sd_fmt->format.code == MEDIA_BUS_FMT_RGB565_1X16) {
+ index = 0;
+ } else {
+ index = 2;
+ }
return &mxc_isi_src_formats[index];
}

 

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tetsuro-okuyama
Contributor V

Hi, @joanxie 


Thank you for your reply!
I'll try it!


Best regards,

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tetsuro-okuyama
Contributor V

While reviewing the settings, I have two additional questions.

  1. What is the gasket?(IMX8MPRM Rev. D, 12/2020 P.5402 Gasket 0 Control Register (GASKET_0_CTRL))
    Tell me the definition of This word.

  2. What is the ISI Pixel Count Register and ISI Line Count Register?(IMX8MPRM Rev. D, 12/2020 P.5402 7Ch and 80h)
    Which pixel or line are these counting?

Best regards,

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joanxie
NXP TechSupport
NXP TechSupport

I searched and didn't find definition of these two registers, and I don't find driver has them, so I don't think you need to modify them in your case

 

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tetsuro-okuyama
Contributor V

Oops, I forgot to attach the file.

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