I got a bit further. I have made a patch for this repo:
remote.origin.url=https://git.kontron-electronics.de/sw/misc/u-boot.git
It now boots the SPL on uart1 and then tells the kernel to boot on uart3. I gees I need to do some cleanup (remove uart2 from spl completly) and tell kernel to use uart1 for console.
The main problem was that the clock to uart1 was not enabled.
This is the patch:
From b75832d89818e7f1963febccf45046d4ec2094cc Mon Sep 17 00:00:00 2001
From: Anders Gnistrup <ag@wegsol.io>
Date: Wed, 4 Feb 2026 10:45:58 +0100
Subject: [PATCH] Use uart1 instead of uart3
Sort of work, but it seems that the kernel config needs to be told to
boot from uart1 also.
---
.../dts/imx8mm-kontron-bl-common-u-boot.dtsi | 10 ++++++++++
arch/arm/dts/imx8mm-kontron-osm-s.dtsi | 7 ++++---
arch/arm/dts/imx8mm-kontron-sl.dtsi | 20 ++++++++++++++++---
board/kontron/sl-mx8mm/spl.c | 1 +
4 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi
index 0019d5a7858bf0bb29c9d38caebc166281b31faa..99093484c45b91114b2074147693d20c009e7b67 100644
--- a/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-kontron-bl-common-u-boot.dtsi
@@ -54,6 +54,11 @@
bootph-pre-ram;
};
+&pinctrl_uart1 {
+ bootph-pre-ram;
+ bootph-all;
+};
+
&pinctrl_uart3 {
bootph-pre-ram;
bootph-all;
@@ -107,6 +112,11 @@
bootph-pre-ram;
};
+&uart1 {
+ bootph-pre-ram;
+ bootph-all;
+};
+
&uart3 {
bootph-pre-ram;
bootph-all;
diff --git a/arch/arm/dts/imx8mm-kontron-osm-s.dtsi b/arch/arm/dts/imx8mm-kontron-osm-s.dtsi
index d4554296523058b7230e826c72680b0a416bc316..eb71d8abc6461b4b3c9e1830e652657434b5e5b9 100644
--- a/arch/arm/dts/imx8mm-kontron-osm-s.dtsi
+++ b/arch/arm/dts/imx8mm-kontron-osm-s.dtsi
@@ -27,7 +27,7 @@
};
chosen {
- stdout-path = &uart3;
+ stdout-path = &uart1;
};
reg_vdd_carrier: regulator-vdd-carrier {
@@ -394,9 +394,10 @@
pinctrl-0 = <&pinctrl_pwm3>;
};
-&uart1 {
+&uart1 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
};
&uart2 {
@@ -404,7 +405,7 @@
pinctrl-0 = <&pinctrl_uart2>;
};
-&uart3 { /* console */
+&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
diff --git a/arch/arm/dts/imx8mm-kontron-sl.dtsi b/arch/arm/dts/imx8mm-kontron-sl.dtsi
index 2076148e08627a167b3b34d886ec5456bb5e18eb..a7a3ff64ce7480872e299895a990423aa5bc8475 100644
--- a/arch/arm/dts/imx8mm-kontron-sl.dtsi
+++ b/arch/arm/dts/imx8mm-kontron-sl.dtsi
@@ -20,7 +20,7 @@
};
chosen {
- stdout-path = &uart3;
+ stdout-path = &uart1;
};
};
@@ -200,12 +200,17 @@
};
};
-&uart3 { /* console */
+&uart1 { /* console */
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
+ pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+};
+
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
@@ -248,6 +253,15 @@
>;
};
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x0 /* UART_A_RX */
+ MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x0 /* UART_A_TX */
+ MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x0 /* UART_A_CTS */
+ MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x0 /* UART_A_RTS */
+ >;
+ };
+
pinctrl_uart3: uart3grp {
fsl,pins = <
MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x140
diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c
index 50eb0eb13e10d8ae980ef0e51e0a5f13b6dec432..4d5b18f6dd890759bfe728cc5ff5febab35c8150 100644
--- a/board/kontron/sl-mx8mm/spl.c
+++ b/board/kontron/sl-mx8mm/spl.c
@@ -212,6 +212,7 @@ void board_init_f(ulong dummy)
arch_cpu_init();
+ init_uart_clk(0);
init_uart_clk(2);
timer_init();
--
2.43.0