Hello everyone,
I'm trying to configure the SAI MCLK to be an input to the SAI module in order to provide a clock for I2S output transmission signals.
The reference manual for IMX8M plus states that this is possible on chapter 14.1.1.1. However, it is not clear what registers need to be set to enable this functionality, as opposed to the IMX8M mini where the external master clock can be enabled through GPR (e.g. GPR_SAI2_EXT_MCLK_EN). To my understanding, this is different on the IMX8M plus because it uses the Audio Block Control registers.
A fellow NXP technician suggested setting the following:
1. Set the "14.2.3.1.10 SAI2 MCLK SELECT Register" as SPDIF.EXTCLK.
2. Set the "8.2.4.115 SW_MUX_CTL_PAD_SPDIF_EXT_CLK" as ALT0_AUDIOMIX_SPDIF1_EXT_CLK.
3. Set the "14.4.4.1.30 MCLK Control" as MCLK signal pin is an input
in order to provide the mclk through the SPDIF1_EXT_CLK pin.
However, it is still unclear to me where in yocto linux the SAI2 MCLK SELECT Register of audio_blk_ctrl should be set and whether the SPDIF.EXTCLK is capable of working for generating I2S signals.
Thank you
