I'm trying to create a new configuration file for the IMX6SX, in mode =0, the chain is |SJC | SDMA| DAP_A9 |DAP_M4
How/where do you get the ID's for each block? i.e SDMA? DAP_A9? DAP_M4?
# CoreSight Debug Access Port
if { [info exists DAP_TAPID_A9] } {
set _DAP_TAPID_A9 $DAP_TAPID_A9
} else {
set _DAP_TAPID_A9 0x1ba00477 <-- How is the number
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID_M4] } {
set _DAP_TAPID_M4 $DAP_TAPID_M4
} else {
set _DAP_TAPID_M4 0x1ba00477 <-- Where/How is this ID created?
}
jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x2 -irmask 0xf \
-expected-id $_DAP_TAPID_A9
# SDMA / no IDCODE
jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf
# SJC
if { [info exists SJC_TAPID] } {
set _SJC_TAPID SJC_TAPID
} else {
set _SJC_TAPID 0x0190d01d <-- How is this number created
}
已解决! 转到解答。
Here is a working imx6sx.cfg. The issue was in the reset commands. Able to stop, single step, load
transport select jtag
# Slow speed to be sure it will work
adapter_khz 1000
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx6sx
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
jtag newtap $_CHIPNAME dapM4 -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
jtag newtap $_CHIPNAME dapA9 -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
jtag newtap $_CHIPNAME sdma -irlen 5 -ircapture 0x0 -irmask 0x0f \
-expected-id 0x1
jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0f \
-expected-id 0x0891C01D
target create imx6sx.dapM4 cortex_m -chain-position imx6sx.dapM4
imx6sx.dapM4 configure -event "reset-assert" {
echo "Reseting ...."
#cortex_a dbginit
}
imx6sx.dapM4 configure -event reset-init { m4_init }
proc m4_init { } {
echo "Reset-init..."
; # halt the CPU
halt
dap apsel 0
cortex_m reset_config vectreset
}
Here is a working imx6sx.cfg. The issue was in the reset commands. Able to stop, single step, load
transport select jtag
# Slow speed to be sure it will work
adapter_khz 1000
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx6sx
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
jtag newtap $_CHIPNAME dapM4 -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
jtag newtap $_CHIPNAME dapA9 -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
jtag newtap $_CHIPNAME sdma -irlen 5 -ircapture 0x0 -irmask 0x0f \
-expected-id 0x1
jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0f \
-expected-id 0x0891C01D
target create imx6sx.dapM4 cortex_m -chain-position imx6sx.dapM4
imx6sx.dapM4 configure -event "reset-assert" {
echo "Reseting ...."
#cortex_a dbginit
}
imx6sx.dapM4 configure -event reset-init { m4_init }
proc m4_init { } {
echo "Reset-init..."
; # halt the CPU
halt
dap apsel 0
cortex_m reset_config vectreset
}
download the file and refer to
My OpenOcd config file:
http://www.mediafire.com/download/a1nt7bgx72438oi/imx6d-1gb.cfg
http://www.mediafire.com/download/1ukd9y190glid62/imx6q-2gb.cfg
my cfg have some teaching~
Programming Guide: OpenOCD with Eclipse debug u-boot & kernel on i.mx6
Hello,
Using “attribute IDCODE_REGISTER of MX6SLX” from its BSDL file.
SJC_TAPID 0x0891c01d
As for CoreSight Debug Access Ports (one for A9, and one for M4)
You may try DAP_TAPID 0x4ba00477 or just to skip them as SDMA.
Have a great day,
Yuri
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I was looking at the BSDL file and trying to figure out how you got the values:
SJC_TAPID 0x0891c01d
DAP_TAPID 0x4ba00477
Yes there is DAP for each core, so each one will have a different ID? one for the M4 the other for the A9?
Thank you for your help.
OK, I finally have OpenOCD connecting; but still need more information.
OK there are 4 taps:
SJC_0 - 0x0891c01d
SDMA_0 -
ARMCS-DP_0 -
Cortex-A9_0
ARMCS-DP_1
Cortex-M4_0
Here is a start for configuration file for opencod:
# Freescale i.MX6SX series single/dual/quad core processor
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx6sx
}
# CoreSight Debug Access Port A9..
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
# SDMA / no IDCODE
jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
# System JTAG Controller
if { [info exists SJC_TAPID] } {
set _SJC_TAPID $SJC_TAPID
} else {
set _SJC_TAPID 0x0891c01d
}
#SDMA
set _SJC_TAPID2 0x2191c01d
#DAP for ARM Cortex A9
set _SJC_TAPID3 0x2191e01d
#ARM Cortex A9
set _SJC_TAPID4 0x1191c01d
#DAP for ARM M4
#?????
#ARM Cortex M4
#?????
#below needs to change to only use the M4 not A9
jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
-expected-id $_SJC_TAPID -expected-id $_SJC_TAPID2 \
-expected-id $_SJC_TAPID3 -expected-id $_SJC_TAPID4
# GDB target: Cortex-A9, using DAP, configuring only one core
# Base addresses of cores:
# ARM Cortex -A9 - 0x82150000
# core 0 - 0x82152000
set _TARGETNAME $_CHIPNAME.cpu.0
#need to change this for M4..
target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap \
-coreid 0 -dbgbase 0x82150000
# some TCK cycles are required to activate the DEBUG power domain
jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
proc imx6_dbginit {target} {
# General Cortex A8/A9 debug initialisation
cortex_a dbginit
}
# Slow speed to be sure it will work
adapter_khz 1000
$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
proc imx6_dbginit {target} {
# General Cortex A8/A9 debug initialisation
cortex_a dbginit
}
# Slow speed to be sure it will work
adapter_khz 1000
$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME"
$_TARGETNAME configure -event gdb-attach { halt }
I've done an auto scan... here is was devices were found
adapter speed: 1000 kHz
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
RCLK - adaptive
Info : RCLK (adaptive clock speed) not supported - fallback to 8 kHz
Warn : There are no enabled taps. AUTO PROBING MIGHT NOT WORK!!
Info : JTAG tap: auto0.tap tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : JTAG tap: auto1.tap tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
Info : TAP auto2.tap does not have IDCODE
Info : JTAG tap: auto3.tap tap/device found: 0x0891c01d (mfg: 0x00e, part: 0x891c, ver: 0x0)
Warn : AUTO auto0.tap - use "jtag newtap auto0 tap -irlen 4 -expected-id 0x4ba00477"
Warn : AUTO auto1.tap - use "jtag newtap auto1 tap -irlen 8 -expected-id 0x4ba00477"
Warn : AUTO auto2.tap - use "jtag newtap auto2 tap -irlen 5 -expected-id 0x00000000"
Warn : AUTO auto3.tap - use "jtag newtap auto3 tap -irlen 2 -expected-id 0x0891c01d"
Error: auto3.tap: IR capture error; saw 0x0003 not 0x0001
Warn : Bypassing JTAG setup events due to errors
Warn : gdb services need one or more targets defined
Shown below is the configuration for openOCD (imx6sx.cfg)
Need to enable the clock and start the M4; when the command "monitor reset init " it locks up the A9; some times it does not; is there some additional registers to setup?
starting openocd:
sudo ./src/openocd -f interface/ftdi/jtagkey.cfg -f ./tcl/target/imx6sx.cfg
imx6sx.cfg:
transport select jtag
# Slow speed to be sure it will work
adapter_khz 1000
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME imx6sx
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
jtag newtap $_CHIPNAME dapM4 -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
jtag newtap $_CHIPNAME dapA9 -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
jtag newtap $_CHIPNAME sdma -irlen 5 -ircapture 0x0 -irmask 0x0f \
-expected-id 0x1
jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x0 -irmask 0x0f \
-expected-id 0x0891C01D
target create imx6sx.dapM4 cortex_m -chain-position imx6sx.dapM4