IMX6Q processor WDOG output pin configuration

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IMX6Q processor WDOG output pin configuration

2,385 次查看
vinodkumar
Contributor I

Hi all,

we are using IMX6Q processor in our design.

we are using Watch dog output pin to reset PMIC.

As per reference manual, it is configured to GPIO1_9 & GPIO1_1.


But in our board it is connected to GPIO1_3. see attached schematic.


In IMX6Q datasheet, note showing that "WDOG1_B output signals (for each one of the Watchdog modules) do not have dedicated pins, but are muxed out through the IOMUX. See the IOMUX manual for detailed information." see attached



Please let us know this watch dog timer output can be configured to GPIO1_3

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igorpadykov
NXP Employee
NXP Employee

Hi Vinod

GPIO_3 has not option for WDOG output, please check attached part of RM

i.MX6DQ Reference Manual (rev.2  7/2014)

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

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